Foundation IP Lead for AI Silicon: Vendor Strategy

Annapurna Labs; Austin (TX); On-site; USD 241,000 - 326,000; Full time

Job summary

Annapurna Labs in Los Angeles area is seeking a Sr. Manager, Foundation IP to own the foundation IP layer end to end for Trainium and Inferentia blocks. You will lead a hands-on team, set strategy with vendors, and partner with Architecture, Physical Design, CAD and Product Engineering to achieve measurable PPA improvements.

This player‑coach role requires reviewing schematics and layouts directly, mentoring a small team, and driving a world‑class IP portfolio for next‑gen ML accelerators.

Qualifications

• BS in Electrical or Computer Engineering is required.
• Advanced degrees listed (MS or PhD) with relevant experience preferred.
• Experience as the technical interface to IP vendors or foundries and driving SOWs.

Responsibilities

• Own the foundation IP roadmap across standard cells, memory and macros.
• Define deliverable specs, negotiate SOWs, drive ECOs and release cadence.
• Influence vendor roadmaps to secure differentiating PPA features.
• Build IP intake, QA, checklists, regressions, acceptance criteria.
• Lead evaluation of libraries and memory architectures using synthesis/placement tools.
• Drive cell-architecture decisions and coordinate RTL-to-GDSII flow.
• Define memory requirements for ML accelerator workloads and Vmin targets.
• Own memory/vendor relationships and integration support for PD and DFT.

Skills

People management

Foundation IP interface

Vendor management

RTL-to-GDSII flow

Characterization strategy

PPA optimization

Scripting (Python/Tcl)

Education

BS in Electrical or Computer Engineering

MS in Electrical or Computer Engineering

PhD in Electrical Engineering or related field

Tools

Synopsys PrimeLib/SiliconSmart

Cadence Liberate

Cadence Virtuoso

Synopsys ICV

HSPICE/PrimeSim

Job description

Annapurna Labs in Los Angeles area is seeking a Sr. Manager, Foundation IP to own the foundation IP layer end to end for Trainium and Inferentia blocks. You will lead a hands-on team, set strategy with vendors, and partner with Architecture, Physical Design, CAD and Product Engineering to achieve measurable PPA improvements.

This player‑coach role requires reviewing schematics and layouts directly, mentoring a small team, and driving a world‑class IP portfolio for next‑gen ML accelerators.