Senior Interposer Design Automation Engineer

NVIDIA Corporation; Santa Clara (CA); Hybrid; USD 136,000 - 265,000; Full time

Benefits offered by this job

Equity

Benefits package

Career growth

Job summary

NVIDIA is seeking a Senior Physical Design Interposer Engineer in Santa Clara, with options for Austin or remote from CA/TX. You will build and optimize VLSI interposer design flows and automation infrastructure to accelerate production-quality solutions.

Requirements include a BS in CS/EE and 5+ years in flow/methodology development, strong Python/C++ skills, and experience with AI/ML in engineering workflows, plus solid fundamentals in signal integrity and parasitics.

Qualifications

• 5+ years of flow and methodology development experience building flows for interposer design used by engineering teams at scale.
• Strong programming fundamentals in Python and C++, with data structures and object-oriented design.
• Experience applying AI/ML techniques in engineering workflows (LLMs for code generation, ML-assisted design analysis, or AI-assisted flows in EDA).

Responsibilities

• Design and develop VLSI flows and methodologies for interposer design with senior engineers.
• Develop applications to enable project engineers with maintainability and ease of use.
• Create flows/tools to construct, analyze, and validate interposer designs across production stages in the flow.
• Optimize daily workflows for top interposer designers.

Skills

Python

C++

AI/ML in design

VLSI interposer

Flow development

OO design

Education

BS in Computer Science or Electrical Engineering

Job description

NVIDIA is seeking a Senior Physical Design Interposer Engineer in Santa Clara, with options for Austin or remote from CA/TX. You will build and optimize VLSI interposer design flows and automation infrastructure to accelerate production-quality solutions.

Requirements include a BS in CS/EE and 5+ years in flow/methodology development, strong Python/C++ skills, and experience with AI/ML in engineering workflows, plus solid fundamentals in signal integrity and parasitics.