Senior High-Speed AMS Technical Lead - Silicon Photonics

Cisco Systems; Allentown (Lehigh County); On-site; USD 192,000 - 356,000; Full time

Job summary

Cisco Systems is seeking a High-Speed Analog/Mixed-Signal Design Engineer to lead electrical specs, custom circuit design, and verification for next‑gen silicon photonics modules (800G, 1.6T and beyond). You will own end‑to‑end development from concept to production, collaborating with cross‑functional teams across EE, optical, and product architecture.

Based in the United States, the role emphasizes technical leadership, design for testability, and mentoring of engineers within Cisco's Silicon

Qualifications

• Bachelors + 12 years of related experience, or Masters + 8 years, or PhD + 5 years in high-speed AMS design
• Expertise in high-speed optical transceiver design (modulator drivers, TIA, CDR, PLLs, ADC/DAC) with industry tools (Cadence Virtuoso, Spectre, Caliber, SystemVerilog, Verilog‑AMS)
• Ability to lead design teams through full tapeout cycle and deliver silicon products
• Proficiency in Python or C for design automation, scripting, and analytical tools

Responsibilities

• Own datapath & control for high-performance mixed-signal designs for 100G/200G/400G modules
• Drive full‑chip electrical specs and verification plans across EE, optical, and product teams
• Debug silicon and system bottlenecks during bring‑up to improve yield and reliability
• Mentor analog/digital/validation engineers to elevate engineering excellence across data center architectures

Skills

High-speed transceiver design

Cadence Virtuoso

Verilog-AMS

Python or C

Leadership

Education

Bachelor's degree in a related field

Master's or PhD may be preferred

Tools

Cadence

SystemVerilog

Caliber

Job description

Cisco Systems is seeking a High-Speed Analog/Mixed-Signal Design Engineer to lead electrical specs, custom circuit design, and verification for next‑gen silicon photonics modules (800G, 1.6T and beyond). You will own end‑to‑end development from concept to production, collaborating with cross‑functional teams across EE, optical, and product architecture.

Based in the United States, the role emphasizes technical leadership, design for testability, and mentoring of engineers within Cisco's Silicon