Senior High-Performance CPU Core DV Engineer

Socket.dev; Austin (TX); On-site; USD 140,000 - 210,000; Full time

Job summary

SiFive in Austin, TX seeks a Senior Design Verification Engineer to drive functional verification of high-performance CPU core units. You will own verification work across Frontend, Midcore, Load-Store Unit, and hardware prefetch, collaborating with architecture, RTL, performance, and DV teams.

You will build reusable verification methodologies, write coverage, and ensure signoff quality while debugging complex CPU issues with strong technical execution.

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• 3+ years of IP/CPU/core or SoC functional verification experience.
• Hands-on SystemVerilog and UVM verification experience required.

Responsibilities

• Own verification planning and execution for assigned high-performance CPU core areas, from block-level verification through core-level integration.
• Create effective verification strategies and test plans based on CPU architecture and microarchitectural behavior.
• Develop and maintain robust verification environments, testbenches, checkers, scoreboards, assertions, stimulus, and coverage models.
• Define and execute directed and constrained-random tests that expose corner cases in branch prediction, instruction fetch, pipeline interactions, issue/dispatch behavior, hazard handling, load/store ordering, memory consistency, and hardware prefetch behavior.
• Analyze failures, isolate root cause, and drive fixes across RTL, testbench infrastructure, assertions, and test content.
• Collaborate closely with architecture and design teams to review specifications, identify ambiguities early, and improve verification quality and debugability.
• Write functional coverage, analyze code and functional coverage, and close coverage gaps to ensure verification completeness and signoff quality.
• Contribute to reusable DV methodology, automation, and infrastructure that improve team productivity and verification quality across future core generations.

Skills

SystemVerilog

UVM

Test planning

Constrained-random verification

Debugging

Scripting languages

Education

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field

Tools

Simulation environments

Formal verification

Emulation

Job description

SiFive in Austin, TX seeks a Senior Design Verification Engineer to drive functional verification of high-performance CPU core units. You will own verification work across Frontend, Midcore, Load-Store Unit, and hardware prefetch, collaborating with architecture, RTL, performance, and DV teams.

You will build reusable verification methodologies, write coverage, and ensure signoff quality while debugging complex CPU issues with strong technical execution.