Senior CPU Core DV Engineer – High-Performance Verification

SiFive; Santa Clara (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

SiFive is seeking a Senior Design Verification Engineer to drive functional verification of high‑performance CPU core units. The role focuses on out‑of‑order core verification with scope across Frontend, Midcore, Load-Store Unit, and hardware prefetch.

You will work with architecture, RTL, performance, and verification teams to ensure design intent is verified and signoff quality is achieved. The candidate will own meaningful verification work, tackle complex debug issues, and contribute

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science.
• 3+ years of relevant experience in IP, CPU/core, or SoC functional verification.
• Strong hands‑on SystemVerilog and UVM verification experience.

Responsibilities

• Own verification planning and execution for high‑performance CPU core areas from block to core level.
• Create verification strategies and test plans based on architecture and microarchitecture.
• Develop and maintain verification environments, testbenches, checkers, scoreboards, and coverage models.
• Define and execute directed and constrained‑random tests exposing corner cases in branch pred, fetch, pipeline, and memory ordering.
• Analyze failures, isolate root causes, and drive fixes across RTL, testbench, and assertions.
• Collaborate with architecture and design to review specs and improve verification quality.
• Write functional coverage and close gaps to ensure signoff quality.
• Contribute reusable DV methodology and infrastructure to improve team productivity.

Skills

SystemVerilog

UVM

Debugging

Programming

Education

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science

Job description

SiFive is seeking a Senior Design Verification Engineer to drive functional verification of high‑performance CPU core units. The role focuses on out‑of‑order core verification with scope across Frontend, Midcore, Load-Store Unit, and hardware prefetch.

You will work with architecture, RTL, performance, and verification teams to ensure design intent is verified and signoff quality is achieved. The candidate will own meaningful verification work, tackle complex debug issues, and contribute