Senior FPGA Verification Engineer - Imaging Systems

Telemetry Today LLC; Waltham (MA); On-site; USD 191,000 - 253,000; Full time

Job summary

Anduril Industries is seeking a Senior FPGA Verification Engineer to drive the verification and validation of new FPGA/ASIC product lines. You will collaborate with an interdisciplinary team to define, build prototypes, and mature them toward ground and flight testing, leading to robust production readiness.

The role emphasizes verification environment architecture, testbench development in VHDL/SystemVerilog, and leadership for verification teams. A U.S.

Qualifications

• Bachelor's in Electrical Engineering, Computer Engineering, or a related technical field is typically required.
• 8+ years of experience developing HDL firmware for FPGA devices.
• Experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC environment.
• Proven ability to design, implement, and execute verification testbenches for RTL blocks using VHDL and/or SystemVerilog.
• Experience applying chip-level verification methodologies including constrained-random testing, functional coverage analysis, and assertion-based verification (SystemVerilog).
• Experience using Git or Subversion to manage source code and collaborate across engineering teams.
• Eligible to obtain and maintain an active U.S. Secret security clearance.

Responsibilities

• Verification environment architecture and design using SystemVerilog or OVM/UVM.
• Creation of written test plans, test cases, code coverage tracking, and functional coverage tracking.
• Testbench development for RTL block verification using VHDL or SystemVerilog.
• Recommend new tools and practices for continuous improvement in the ASIC/FPGA verification flow.
• Contribute to engineering estimates for new program pursuits.
• Provide technical leadership for project verification teams by breaking down work, planning activities, and reporting status.

Skills

Technical leadership

Testbenches

RTL verification methodologies

Constrained-random testing

Functional coverage analysis

Security clearance

Git/Subversion

Linux/Unix

Python

C/C++

Education

Bachelor's in Electrical Engineering or Computer Engineering

Tools

VHDL

Verilog

SystemVerilog

SystemVerilog/UVM

QuestaSim

Synplify

Quartus

Vivado

Git

Job description

Anduril Industries is seeking a Senior FPGA Verification Engineer to drive the verification and validation of new FPGA/ASIC product lines. You will collaborate with an interdisciplinary team to define, build prototypes, and mature them toward ground and flight testing, leading to robust production readiness.

The role emphasizes verification environment architecture, testbench development in VHDL/SystemVerilog, and leadership for verification teams. A U.S.