Senior FPGA Verification Engineer — Defense Tech, Equity

Anduril Industries; Waltham (MA); On-site; USD 191,000 - 253,000; Full time

Job summary

Anduril Industries is seeking a Senior FPGA Verification Engineer to join the Imaging team in a role focused on architecture, development, and validation of FPGA/ASIC verification flows. You will work with an interdisciplinary team to define, develop, and mature prototypes into production-grade products, with leadership responsibilities for verification across projects.

The role requires a strong background in HDL, RTL design, and verification methodologies, along with the ability to work in a

Qualifications

• Bachelor's degree in Electrical or Computer Engineering.
• 8+ years HDL firmware experience for FPGA devices.
• Experience RTL design/simulation using VHDL/Verilog in FPGA/ASIC environments.
• Proven testbench design for RTL blocks using VHDL and/or SystemVerilog.
• Experience with constrained-random testing, functional coverage, and assertion-based verification (SystemVerilog).
• Experience with Git or Subversion for source control.
• Eligible to obtain and maintain an active U.S. Secret security clearance.

Responsibilities

• Verification environment architecture and design using SystemVerilog/OVM/UVM.
• Create test plans, test cases, and coverage tracking.
• Develop testbenches for RTL blocks using VHDL/SystemVerilog.
• Recommend new tools and practices for verification flow improvements.
• Contribute to engineering estimates for new programs.
• Provide technical leadership for project verification teams.

Skills

HDL firmware

RTL verification

Version control

Education

Bachelor's in Electrical Engineering or Computer Engineering

Tools

QuestaSim

Synplify

Quartus

Vivado

Job description

Anduril Industries is seeking a Senior FPGA Verification Engineer to join the Imaging team in a role focused on architecture, development, and validation of FPGA/ASIC verification flows. You will work with an interdisciplinary team to define, develop, and mature prototypes into production-grade products, with leadership responsibilities for verification across projects.

The role requires a strong background in HDL, RTL design, and verification methodologies, along with the ability to work in a