Senior FPGA Verification Engineer – 100G & UVM Expert

Amazon; Arlington (VA); On-site; USD 136,000 - 184,000; Full time

Job summary

Amazon Development Center U.S., Inc. in Arlington, VA is seeking a FPGA Verification Engineer to develop SystemVerilog/UVM testbenches and verification environments for 100G+ designs.

You will collaborate with RTL and hardware teams to translate specifications into robust verification plans, constraints, and scoreboards, and to debug and resolve failures in simulation. This role requires US citizenship and an active TS/SCI clearance (with polygraph) and offers a chance to contribute to AWS

Qualifications

• BS in Electrical or Communications Engineering or related field.
• Minimum 3+ years in design/architecture and 4+ years verification experience.
• Experience with SystemVerilog/UVM for FPGA/ASIC verification.

Responsibilities

• Develop UVM/SystemVerilog testbenches for 100G+ solutions.
• Create verification plans with coverage models and constrained-random stimulus.
• Collaborate with RTL designers to meet specs and performance targets.
• Debug simulations and drive root-cause resolution.

Skills

SystemVerilog

UVM

FPGA verification

Education

Electrical/Communications Eng

Tools

Xilinx Vivado

Synopsys VCS

Cadence Xcelium

Job description

Amazon Development Center U.S., Inc. in Arlington, VA is seeking a FPGA Verification Engineer to develop SystemVerilog/UVM testbenches and verification environments for 100G+ designs.

You will collaborate with RTL and hardware teams to translate specifications into robust verification plans, constraints, and scoreboards, and to debug and resolve failures in simulation. This role requires US citizenship and an active TS/SCI clearance (with polygraph) and offers a chance to contribute to AWS