FPGA Verification Engineer – 100G+ Systems

Amazon Web Services (AWS); Arlington (VA); On-site; USD 136,000 - 184,000; Full time

Job summary

Amazon Web Services (AWS) in Arlington, VA is seeking a verification engineer to develop UVM/SystemVerilog testbenches for 100G+ solutions, collaborate with RTL designers, and implement functional coverage. The role requires a TS/SCI clearance with polygraph and hands-on verification experience in FPGA/ASIC verification, SystemVerilog, and UVM.

You will work with a cross-functional hardware team to validate complex cloud networking hardware.

Qualifications

• Bachelor's degree in Electrical or Communications Engineering or a related field.
• 3+ years of non-internship design or architecture experience in new and existing systems.
• 4+ years of verification experience using SystemVerilog and/or UVM.
• 2+ years verifying digital logic designs (FPGA or ASIC).
• Active US Government Top Secret clearance with SCI eligibility or above.

Responsibilities

• Develop UVM/SystemVerilog testbenches to verify custom RTL designs and third-party IP integrations for 100G+ solutions
• Create and execute verification plans including functional coverage models, assertions, and constrained-random stimulus
• Collaborate with design engineers to understand specifications and identify verification requirements and corner cases
• Develop bus functional models, scoreboards, and checkers for complex interface protocols
• Debug simulation failures, analyze waveforms, and drive issues to root cause resolution
• Support FPGA-in-the-loop and hardware validation efforts by developing test sequences and diagnostic utilities

Skills

SystemVerilog

UVM

Digital logic verification

FPGA/ASIC verification

Education

Bachelor's degree in Electrical or Communications Engineering

Tools

Xilinx Vivado

Synopsys VCS

Cadence Xcelium

Job description

Amazon Web Services (AWS) in Arlington, VA is seeking a verification engineer to develop UVM/SystemVerilog testbenches for 100G+ solutions, collaborate with RTL designers, and implement functional coverage. The role requires a TS/SCI clearance with polygraph and hands-on verification experience in FPGA/ASIC verification, SystemVerilog, and UVM.

You will work with a cross-functional hardware team to validate complex cloud networking hardware.