Senior FPGA Verification Engineer

Cesiumastro; El Segundo (CA); On-site; USD 165,000 - 199,000; Full time

Job summary

CesiumAstro in El Segundo, CA, is seeking a Staff FPGA Engineer to lead verification of FPGA-based hardware for satellites and aerospace systems. You will establish verification methodologies, guide complex debugging, and drive improvements across products to enhance performance and reliability.

The ideal candidate has 8+ years in FPGA design/verification with HDL, UVM, and experience with Vivado or Quartus, plus strong communication skills and the ability to work across a distributed team.

Qualifications

• BS or MS in Electrical or Computer Engineering from an accredited university.
• 8 years of industry or university research experience in FPGA design, analysis, and HDL implementation.
• Extensive knowledge of digital logic design, FPGA architecture, HDL, and digital systems.
• Proficiency developing FPGA verification environments for complex products.
• Understanding of FPGA verification methodologies, timing closure, embedded systems, and high-speed interfaces.
• Working knowledge of the UVM Framework (UVMF), including testbenches and automated environments.
• Proficiency with Microsoft Office Suite (Outlook, Word, Excel, PowerPoint, Teams).
• FPGA tools: Vivado, Quartus Prime, ModelSim, QuestaSim.
• Engineering analysis, version control, and collaboration tools (MATLAB, Git, Jira, Windchill).
• Excellent written and verbal communication skills.

Responsibilities

• Lead complex FPGA verification, debugging, and qualification activities supporting product development.
• Evaluate simulation results and engineering risks while directing solutions that improve product performance and reliability.
• Validate FPGA designs through verification planning, qualification testing, failure analysis, root-cause investigations, and change implementation.
• Develop verification plans and verification review packages supporting engineering decisions.
• Support customer meetings, design reviews, hardware integration, and product development activities by providing FPGA engineering guidance.
• Evaluate FPGA verification methods and technical requirements to identify improvements.
• Drive initiatives that enhance FPGA performance, engineering efficiency, product reliability, design quality, and long-term maintainability.

Skills

HDL design

Digital logic

FPGA verification

UVM Framework

Testbench development

Git (version control)

MATLAB

Jira

Education

BS/MS in Electrical or Computer Engineering

Tools

Vivado

Quartus Prime

ModelSim

QuestaSim

Git

Job description

CesiumAstro in El Segundo, CA, is seeking a Staff FPGA Engineer to lead verification of FPGA-based hardware for satellites and aerospace systems. You will establish verification methodologies, guide complex debugging, and drive improvements across products to enhance performance and reliability.

The ideal candidate has 8+ years in FPGA design/verification with HDL, UVM, and experience with Vivado or Quartus, plus strong communication skills and the ability to work across a distributed team.