Senior FPGA Validation Engineer, HW/SW Co-Design

Advanced Micro Devices

San Jose (CA)

On-site

USD 140,000 - 230,000

Full time

9 days ago
Application generator

Turn this role into an interview — a resume and cover letter built around what this employer wants.

Get past ATS filters

Job summary

Advanced Micro Devices is seeking a senior FPGA/embedded systems engineer in the San Jose area to design and validate high-speed FPGA solutions and the embedded software that drives them. You will work across PCIe, memory, and connectivity interfaces, collaborating with architects, hardware and firmware teams to deliver robust hardware and software stacks.

Requirements include 8+ years in FPGA design, strong SystemVerilog/VHDL, Yocto-based Linux flows, and proven board bring-up abilities.

Qualifications

  • 8+ years of hands-on FPGA design experience.
  • Strong SystemVerilog/Verilog and/or VHDL with Vivado experience.
  • Deep knowledge of clocking, CDC, timing constraints, and STA.
  • Experience in high-reliability, low-latency systems.
  • Experience with SystemVerilog testbenches.
  • Experience with Yocto-based Embedded Linux flows (BSPs, device trees).
  • Excellent hardware debug skills with ILA, scopes, and logic analyzers.
  • Board bring-up and validation experience.

Responsibilities

  • Lead architecture, design, implementation, prototyping, validation, and support across the product cycle.
  • Collaborate with architects, hardware and firmware engineers to scope new features.
  • RTL development: design, verify, and validate high-performance logic for PCIe/SerDes and memory interfaces.
  • Embedded system development: firmware and low-level software for ARM/RISC-V cores with Yocto-based tooling.
  • System-level integration: use Vivado/Vitis to integrate IPs, NoC, and memory; bring-up Baremetal/Linux.
  • Pre-Si verification: run verification and emulation to confirm correctness and performance.
  • Board bring-up and validation: support power-on to validated platform with bench/scripts.
  • Post-Si validation: debug interactions between software, IPs, and FPGA fabric.

Skills

FPGA design
SystemVerilog
Verilog/VHDL
Yocto Linux
C/C++ bare-metal
Embedded Linux
Board bring-up
Oscilloscopes/Debug
PCIe/SerDes
Git/CI tooling

Education

Bachelors or Masters in EE/CE

Tools

Yocto
Vivado
Vitis
EDA tools

Job description

Advanced Micro Devices is seeking a senior FPGA/embedded systems engineer in the San Jose area to design and validate high-speed FPGA solutions and the embedded software that drives them. You will work across PCIe, memory, and connectivity interfaces, collaborating with architects, hardware and firmware teams to deliver robust hardware and software stacks.

Requirements include 8+ years in FPGA design, strong SystemVerilog/VHDL, Yocto-based Linux flows, and proven board bring-up abilities.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Senior FPGA/SoC Validation Engineer
Senior FPGA/SoC Validation Engineer

AMD • San Jose (CA)

On-site
USD 180,000 - 260,000
Benefits
Senior FPGA SoC Solution Validation Engineer
Senior FPGA SoC Solution Validation Engineer

Advanced Micro Devices • San Jose (CA)

On-site
USD 120,000 - 180,000
AMD Benefits
Senior FPGA/PCIe Solutions Engineer
Senior FPGA/PCIe Solutions Engineer

Advanced Micro Devices • San Jose (CA)

On-site
USD 150,000 - 230,000
FPGA Validation Engineer – Embedded & RTL
FPGA Validation Engineer – Embedded & RTL

AMD • San Jose (CA)

On-site
USD 190,000 - 260,000
Board Design & Field Systems Engineer (FPGA/High-Speed)
Board Design & Field Systems Engineer (FPGA/High-Speed)

Advanced Micro Devices • San Jose (CA)

On-site
USD 100,000 - 140,000
Systems Design Engineer – Firmware & Validation
Systems Design Engineer – Firmware & Validation

Advanced Micro Devices • Santa Clara (CA)

On-site
USD 120,000 - 180,000
FPGA Prototyping Lead — Drive SoC Validation & Architecture
FPGA Prototyping Lead — Drive SoC Validation & Architecture

Advanced Micro Devices • San Jose (CA)

On-site
USD 160,000 - 210,000
Firmware Design Engineer: Systems & Validation
Firmware Design Engineer: Systems & Validation

AMD • Santa Clara (CA)

Hybrid
USD 120,000 - 180,000
Hybrid work model
Senior FPGA Systems Validation Engineer
Senior FPGA Systems Validation Engineer

Microchip • San Jose (CA)

On-site
USD 70,304 - 143,000
Wellness & medical benefits
Restricted stock grant
Employee stock purchase plan
+3
Design Verification Lead — PCIe/CXL & High‑Speed IP
Design Verification Lead — PCIe/CXL & High‑Speed IP

Advanced Micro Devices • San Jose (CA)

On-site
USD 140,000 - 210,000