Senior FPGA Systems Engineer – Validation & Lab Bringup

Microchip Technology Inc.; San Jose (CA); On-site; USD 91,000 - 232,000; Full time

Job summary

Microchip Technology Inc. in San Jose, CA, is seeking a Senior Technical Staff Engineer – Validation (System Design) to lead FPGA system-level design, bring-up, and validation in a lab setting.

You will define use models, develop validation plans, mentor engineers, and collaborate across teams, leveraging RTL coding in Verilog/VHDL and high-speed serial interfaces. Ideal candidates have extensive FPGA experience, ModelSim/Synplicity tooling, and a strong background in embedded processors and

Qualifications

• BSEE or BSCS with 15+ years of experience.
• MSEE / MSCS preferred.
• Knowledge of FPGA architectures is a must.
• Strong technical background in FPGA prototype emulation and debug.
• Silicon validation, failure analysis and debug experience.
• Excellent board-level debug capabilities in lab environment.
• RTL coding in Verilog and VHDL.
• Experience with ModelSim and Synthesis tools.
• Knowledge of embedded processors and peripherals (SPI, I2C, UART, Ethernet, PCI, USB).
• Familiarity with high-speed SERDES and PCIe is a plus.

Responsibilities

• Be an expert with FPGA-based system-level designs, bring-up, and lab validation including partial reconfiguration use cases.
• Architect and create FPGA designs using hardware features and IP cores.
• Ensure system designs exercise use models for products and emulate customer scenarios.
• Develop high-level validation plans and execute, assess dependencies and risks.
• Understand hardware architectures and define use models for silicon features.
• Lead protocol knowledge on high-speed serial interfaces in a cross-functional team.
• Write high-quality Verilog, VHDL, and C code; maintain and reuse existing code.
• Learn new system designs and validation methodologies and stay current with FPGA architectures.
• Mentor senior and junior engineers and provide technical guidance across teams.
• Collaborate with managers to identify inter-dependencies and improve processes.
• Be willing to take late night or early morning calls for alignment with India team (IST).
• Leverage AI-based tools to automate workflows and improve FPGA design/validation.

Skills

FPGA architectures

Verilog

VHDL

C / C++

Partial reconfiguration

System-level design

Lab bring-up

High-speed SerDes

PCIe

Ethernet

JTAG

Python

Perl

TCL scripting

RTL coding

ModelSim

Synthesis tools

Embedded processors

Education

BSEE / BSCS or equivalent

MSEE / MSCS preferred

Tools

ModelSim

Synplicity

FPGA toolchains

Xilinx/FPGA toolchains

Job description

Microchip Technology Inc. in San Jose, CA, is seeking a Senior Technical Staff Engineer – Validation (System Design) to lead FPGA system-level design, bring-up, and validation in a lab setting.

You will define use models, develop validation plans, mentor engineers, and collaborate across teams, leveraging RTL coding in Verilog/VHDL and high-speed serial interfaces. Ideal candidates have extensive FPGA experience, ModelSim/Synplicity tooling, and a strong background in embedded processors and