Senior Technical Staff Engineer - Validation (System Design)

Microchip Technology Inc.; San Jose (CA); On-site; USD 91,000 - 232,000; Full time

Job summary

Microchip Technology Inc. in San Jose, CA, is seeking a Senior Technical Staff Engineer – Validation (System Design) to lead FPGA system-level design, bring-up, and validation in a lab setting.

You will define use models, develop validation plans, mentor engineers, and collaborate across teams, leveraging RTL coding in Verilog/VHDL and high-speed serial interfaces. Ideal candidates have extensive FPGA experience, ModelSim/Synplicity tooling, and a strong background in embedded processors and

Qualifications

• BSEE or BSCS with 15+ years of experience.
• MSEE / MSCS preferred.
• Knowledge of FPGA architectures is a must.
• Strong technical background in FPGA prototype emulation and debug.
• Silicon validation, failure analysis and debug experience.
• Excellent board-level debug capabilities in lab environment.
• RTL coding in Verilog and VHDL.
• Experience with ModelSim and Synthesis tools.
• Knowledge of embedded processors and peripherals (SPI, I2C, UART, Ethernet, PCI, USB).
• Familiarity with high-speed SERDES and PCIe is a plus.

Responsibilities

• Be an expert with FPGA-based system-level designs, bring-up, and lab validation including partial reconfiguration use cases.
• Architect and create FPGA designs using hardware features and IP cores.
• Ensure system designs exercise use models for products and emulate customer scenarios.
• Develop high-level validation plans and execute, assess dependencies and risks.
• Understand hardware architectures and define use models for silicon features.
• Lead protocol knowledge on high-speed serial interfaces in a cross-functional team.
• Write high-quality Verilog, VHDL, and C code; maintain and reuse existing code.
• Learn new system designs and validation methodologies and stay current with FPGA architectures.
• Mentor senior and junior engineers and provide technical guidance across teams.
• Collaborate with managers to identify inter-dependencies and improve processes.
• Be willing to take late night or early morning calls for alignment with India team (IST).
• Leverage AI-based tools to automate workflows and improve FPGA design/validation.

Skills

FPGA architectures

Verilog

VHDL

C / C++

Partial reconfiguration

System-level design

Lab bring-up

High-speed SerDes

PCIe

Ethernet

JTAG

Python

Perl

TCL scripting

RTL coding

ModelSim

Synthesis tools

Embedded processors

Education

BSEE / BSCS or equivalent

MSEE / MSCS preferred

Tools

ModelSim

Synplicity

FPGA toolchains

Xilinx/FPGA toolchains

Job description

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.

Visit our careers page to see what exciting opportunities and company perks await!

Job Description

Microchip Technology Inc. is a leading provider of embedded control applications. Our product portfolio comprises general purpose and specialized 8‑bit, 16‑bit, and 32‑bit microcontrollers, 32‑bit microprocessors, field‑programmable gate array (FPGA) products, a broad spectrum of high‑performance linear, mixed‑signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM). We also license Flash‑IP solutions that are incorporated in a broad range of products.

Microchip Technology Inc. has a Senior Technical Staff Engineer – Validation (System Design) opening based in San Jose, CA. The candidate will be an expert with lab bring up and automation of FPGA design creation and validation; and be able to use FPGAs to create systems‑level designs; also possess expertise in development of partial re‑configuration use cases. The successful candidate will be responsible for the following:

• Be an expert with use of FPGAs to create systems‑level designs to bring up and debug such systems in the lab, including having deep experience in validating systems‑level UCs for partial reconfiguration
• Architecture definition and FPGA design creation utilizing all hardware features and IP cores targeted to existing and future Microchip products
• System and FPGA design must exercise all the use models targeted for each product mimicking end applications in a customer setting
• Develop high‑level system and product level validation plans for new and existing silicon products and projects, execute per plan, review dependencies, estimate effort and identify and communicate risk
• Understand hardware architectures, define use models and execute/oversee system level design implementations required to utilize the silicon features
• Be not only an effective contributor but also the technical expert related to protocols using high speed serial interfaces in a cross‑functional team‑oriented environment
• Write high quality code in Verilog, VHDL and C code. Maintain existing code and support regression and re‑use
• Learn new system designs and validation methodologies. Understand FPGA architectures
• Act as the authoritative expert in knowledge domain area(s), be able to mentor senior and junior engineers and provide technical guidance. This involves assigning and monitoring tasks of employees and contractors
• Collaborate with cross‑functional managers/teams to identify and resolve inter‑dependencies
• Define and improve process followed in the department; follow quality metrics and assess per project
• Must be willing to take regular late night or early morning calls to interface with the engineering team in India Standard Time zone, when and if required
• Use AI based tools to automate workflows and help improve the FPGA design and validation processes

Requirements / Qualifications

• BSEE / BSCS or equivalent with 15+ years of experience
• MSEE / MSCS preferred
• Knowledge of FPGA architectures is a must
• Possess an in‑depth understanding of hardware architectures, system level IC design implementation, and knowledge of how to create end use scenarios
• Strong technical background in FPGA prototype emulation and debug
• Strong technical background in silicon validation, failure analysis and debug
• Excellent Board level debug capabilities in lab environment: hands‑on troubleshooting skills for digital logic and analog circuit on PCBs using oscilloscopes, digital analyzers, protocol exercisers and analyzers, integrated logic analyzers (e.g. Synopsys Identify, Xilinx Chipscope, Altera Signalscope, Lattice Reveal)
• Design with RTL coding in Verilog and VHDL is a must
• Experience using Simulation (ModelSim) and Synthesis (Synplicity) tools
• Good knowledge of validating system level designs based on embedded processors and peripherals such as SPI, I2C, UART, Ethernet, PCI and USB
• Familiarity with the bring up and on‑board debug of 32Gbps SERDES
• Hands‑on systems level design and debug experience with following high‑speed serial communications protocols (must: PHY, PCS and Data link layer of the OSI protocol stack; desirable: transaction and upper layers of the OSI protocol):
• Protocol Testing at UNH for various IEEE Clauses pertaining to
• Layer 1/2/3 of Gigabit Ethernet
• PCIe Gen3/4/5
• Experience with the Lab Equipment
• Spirent Test Center or equivalent Traffic Generators and Checkers
• PCIe Analyzer & PCIe Exerciser
• Strong commitment to quality and customer satisfaction
• Excellent verbal and written communication skills in English
• Able to travel 0‑2 times annually if required
• C, C++ or object‑oriented programming skills is required
• Knowledge and experience in embedded firmware development
• Knowledge and experience in JTAG, SVF and 1532 standards and STAPL programming is desirable
• Experience with Python/PERL/TCL scripting

Preferred Qualifications

Familiarity with any high speed SERDES controllers that make use of 32Gbps PCS, PMA:

• Ethernet 1, 2.5, 5, 10, 25, 40, 50, 100, 200, 400 Gbps, including familiarity with (U)S(X)GMII
• Interlaken (4.25 to 412.5 Gbps)
• OTN OTUx (2.66 to 131 Gbps), or SONET/SDH OC3/12/48/192
• (E,X,XGS,NG)-PON or 100G-EPON
• Video interfaces SDI‑SD/HD/3GHD and SDI (5.94, 11.88Gbps), Displayport (6.48 to 25.92Gbps), HDMI (3.96 to 42.66 Gbps)
• JESD204C (6.375 to 32 Gbps)

Design and debug experience for any of the below high‑speed serial communications protocols is a plus, but not necessary:

• Hybrid Memory Cube
• CPRI Rate 1 to 10+
• Serial Rapid IO 4.1
• USB 3.0
• SATA I, II, III
• Fiber Channel
• CoaXpress

Percentage Of Time Spent

• Documentation – 15%
• Design Creation & Verification – 25%
• Lab Bringup & Debug – 60%

Essential Physical Functions And Working Conditions

• 50 % work in front of computer
• 50 % work in the lab

Travel Time

0% – 25%

Physical Attributes

Feeling, Handling, Hearing, Seeing, Talking, Works Alone, Works Around Others

Physical Requirements

• 70 % sitting, 15 % standing, 15 % walking; 100 % in doors; Usual business hours.

Pay Range

We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature.

• The annual base salary range for this position, which could be performed in the US, is $91,000 – $232,000.*
• Range is dependent on numerous factors including job location, skills and experience.

Benefits of working at Microchip

Benefits of working at Microchip

Equity and Compensation

Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.

Equal Employment Rights

For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.