Senior FPGA RTL Architect – High-Speed Systems

Fidus Systems; Seattle (WA); In loco; USD 110.000 - 160.000; Tempo pieno

Vantaggi offerti da questo lavoro

Medical, dental, vision

401(k) with matching

Profit-sharing bonus

Descrizione del lavoro

Fidus Systems seeks an experienced FPGA Designer to deliver complex FPGA-based systems for diverse clients. You will architect, implement RTL, integrate IP, run simulations, and support lab bring-up and debugging across multiple domains including video and communications.

Ideal candidates have 5+ years in RTL/Verilog/VHDL, hands-on with Xilinx or Altera toolchains, and strong communication skills to work with customers and cross-functional teams in a dynamic, high-tech environment.

Competenze

• Minimum 5 years of RTL/Verilog/VHDL FPGA design experience.
• Experience with video systems, high-speed memory interfaces, and DSP/processor instantiations.
• Proven ability to work with Xilinx or Altera FPGA families and tool flows.

Mansioni

• Develop complex FPGA/CPLD-based systems from architecture to timing closure.
• Create simulations, integrate IP, and perform lab bring-up and debugging.
• Lead design reviews for hardware-software interfaces and I/O.
• Prepare test plans, design descriptions and user documentation.
• Provide estimates on project scope, schedule, and deliverables.
• Collaborate with cross-functional teams including hardware, software and sales.
• Support customers during pre-sales and implementation phases.

Conoscenze

RTL design

Verilog

SystemVerilog

VHDL

FPGA design

Xilinx Vivado

Altera Quartus

ModelSim

Communication

Formazione

B.A.Sc., B.Eng. or equivalent

Strumenti

Xilinx Vivado

Altera Quartus

ModelSim

Intel FPGA toolchains

Descrizione del lavoro

Fidus Systems seeks an experienced FPGA Designer to deliver complex FPGA-based systems for diverse clients. You will architect, implement RTL, integrate IP, run simulations, and support lab bring-up and debugging across multiple domains including video and communications.

Ideal candidates have 5+ years in RTL/Verilog/VHDL, hands-on with Xilinx or Altera toolchains, and strong communication skills to work with customers and cross-functional teams in a dynamic, high-tech environment.