Senior FPGA Engineer, Space Systems & High‑Speed DSP

Viasat; Tempe (AZ); On-site; USD 132,500 - 209,500; Full time

Job summary

Viasat in Tempe, Arizona is seeking a Senior FPGA Engineer to design and implement high-speed signal-processing algorithms and network protocols in FPGAs. The position requires ownership of the entire design process from requirements to integration, collaborating with engineers from various fields.

The ideal candidate will have a Bachelor's Degree in Electrical Engineering and over 6 years of FPGA design experience, particularly with Xilinx Vivado. Additional skills in digital signal processing and good communication abilities are essential.

Qualifications

• 6+ years FPGA design experience, including Xilinx Vivado.
• Strong knowledge of System Verilog and/or VHDL.
• Experience with RTL design for signal processing blocks.

Responsibilities

• Own the architecture, design, and implementation of FPGA systems.
• Develop RTL in Verilog, SystemVerilog, or VHDL.
• Collaborate with team members on digital signal processing algorithms.

Skills

FPGA design experience

System Verilog

VHDL

Digital logic understanding

Signal processing experience

Lab equipment operation

Communication skills

Education

Bachelor Degree in Electrical Engineering or related field

Tools

Xilinx Vivado

Programmable Logic EDA tools

Logic analyzers

DMM

Spectrum analyzers

Job description

Viasat in Tempe, Arizona is seeking a Senior FPGA Engineer to design and implement high-speed signal-processing algorithms and network protocols in FPGAs. The position requires ownership of the entire design process from requirements to integration, collaborating with engineers from various fields.

The ideal candidate will have a Bachelor's Degree in Electrical Engineering and over 6 years of FPGA design experience, particularly with Xilinx Vivado. Additional skills in digital signal processing and good communication abilities are essential.