Senior FPGA/SoC Engineer - SATCOM & High-Perf IP

Employee Relations Associates, Inc.; Chandler (AZ); Hybrid; USD 120,000 - 180,000; Full time

Benefits offered by this job

Medical benefits

Dental benefits

Vision benefits

Life insurance

401(k)

Holiday pay

Job summary

Employee Relations Associates, Inc. in Chandler, AZ is seeking a Senior FPGA Engineer to lead the design, development, and debugging of FPGA SoC systems for advanced satellite communications.

The role emphasizes IP integration, high-performance RTL, and userspace driver/firmware development. Requirements include 5+ years in FPGA/ASIC SoC design, hands-on experience with Quartus or Vivado, and strong C/C++, with a focus on timing, validation, and cross‑functional collaboration in a secure

Qualifications

• 5+ years of FPGA/ASIC SoC design experience.
• Hands-on design, synthesis, and debugging for FPGA systems.
• Experience with IP integration and SOC development.

Responsibilities

• Lead FPGA SoC design, development, and debugging.
• Develop high-performance RTL and firmware for embedded MPUs.
• Create and validate userspace drivers for FPGA IP.

Skills

RTL design & debugging

C/C++

Git

Cross‑functional teamwork

High-level FPGA architecture

Education

Bachelor's degree in Electrical or Computer Engineering

Tools

Quartus (Altera)

Vivado (Xilinx)

AMBA AXI/APB interfaces

Job description

Employee Relations Associates, Inc. in Chandler, AZ is seeking a Senior FPGA Engineer to lead the design, development, and debugging of FPGA SoC systems for advanced satellite communications.

The role emphasizes IP integration, high-performance RTL, and userspace driver/firmware development. Requirements include 5+ years in FPGA/ASIC SoC design, hands-on experience with Quartus or Vivado, and strong C/C++, with a focus on timing, validation, and cross‑functional collaboration in a secure