Senior FPGA & DSP Engineer — Hardware-Software Integration

Leidos; Maryland; On-site; USD 130,000 - 190,000; Full time

Benefits offered by this job

Paid Time Off

Paid Holidays

401(k) With 6% Company Match

Flexible Schedules

Discounted Stock Purchase Plan

Technical Upskilling

Education and Training Support

Paid Parental Leave

Health and Wellness Programs

Income Protection

Retirement Benefits

Sign-On Bonus

Paid Time Off Bonus

Job summary

Leidos seeks an experienced FPGA/embedded engineer to lead design, development, construction and testing of FPGA hardware and software processing blocks for RF subsystems. You will implement DSP algorithms in FPGA, integrate with existing Linux code, and document the technical work.

Requires a BS and 8+ years, active TS/SCI with polygraph; Vivado experience is required and Epiq Solution PDK is preferred. This role demands strong problem solving, architecture definition, and rigorous validation

Qualifications

• Requires a bachelor’s degree and at least eight years of relevant experience.
• Active TS/SCI clearance with polygraph is required.
• Vivado experience is required; Epiq Solution PDK experience is preferred.

Responsibilities

• Lead the design, development, construction, and testing of FPGA hardware and software processing components for RF subsystems.
• Implement DSP algorithms in FPGA hardware and integrate them with Linux software and code bases.
• Document the technical work and ensure traceability and validation.

Skills

FPGA Development

Digital Signal Processing

FPGA RTL Development

C

C++

Linux

Hardware-Software Integration

Signal Processing

Timing Closure

Resource Optimization

RF Communications

Technical Documentation

Vivado

Epiq Solution PDK

Education

Bachelor's degree

Tools

Vivado

Epiq Solution PDK

Job description

Leidos seeks an experienced FPGA/embedded engineer to lead design, development, construction and testing of FPGA hardware and software processing blocks for RF subsystems. You will implement DSP algorithms in FPGA, integrate with existing Linux code, and document the technical work.

Requires a BS and 8+ years, active TS/SCI with polygraph; Vivado experience is required and Epiq Solution PDK is preferred. This role demands strong problem solving, architecture definition, and rigorous validation