Lead FPGA & DSP Software Engineer

Leidos LLC; Maryland; On-site; USD 154,000 - 278,000; Full time

Benefits offered by this job

Paid Time Off

11 paid Holidays

401K with company match

Flexible schedules

Discounted Stock Purchase Plans

Technical Upskilling

Education and Training Support

Parental Paid Leave

Job summary

Leidos is seeking a Principal Hardware/Software Design Engineer for the Intelligence Sector to design, develop, and test FPGA-based hardware and software processing components for RF systems. The role combines hardware RTL work with software integration, requiring leadership in technical design efforts and strong DSP expertise.

Qualified candidates should have extensive FPGA experience, DSP algorithm implementation, Linux proficiency, and a TS/SCI with Polygraph clearance.

Qualifications

• Bachelor's degree plus 8 years of related experience or equivalent.
• Active TS/SCI with Polygraph clearance required.
• Experience with FPGA RTL development and timing closure.
• Strong C/C++ programming and Linux experience.
• DSP algorithms implementation in FPGA hardware.

Responsibilities

• Implement DSP components in FPGA for codebase integration.
• Develop FPGA code, DSP theory and interfacing with software.
• Lead design efforts and document hardware/software work.
• Bridge FPGA to software stack and ensure system integration.
• Support mission-critical hardware and software requirements.

Skills

FPGA development

DSP implementation

C/C++

Linux

Hardware-software integration

Signal processing

Embedded systems

Leadership

Education

Bachelor's degree

Tools

Vivado

Epiq Solution PDK

Job description

Leidos is seeking a Principal Hardware/Software Design Engineer for the Intelligence Sector to design, develop, and test FPGA-based hardware and software processing components for RF systems. The role combines hardware RTL work with software integration, requiring leadership in technical design efforts and strong DSP expertise.

Qualified candidates should have extensive FPGA experience, DSP algorithm implementation, Linux proficiency, and a TS/SCI with Polygraph clearance.