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Leidos seeks an experienced FPGA/embedded engineer to lead design, development, construction and testing of FPGA hardware and software processing blocks for RF subsystems. You will implement DSP algorithms in FPGA, integrate with existing Linux code, and document the technical work.
Requires a BS and 8+ years, active TS/SCI with polygraph; Vivado experience is required and Epiq Solution PDK is preferred. This role demands strong problem solving, architecture definition, and rigorous validation
Lead the design, development, construction, and testing of FPGA hardware and software processing components for RF communication and collection subsystems. Implement DSP algorithms in FPGA hardware, integrate them with existing Linux software and code bases, and document the technical work.
Requires a bachelor's degree and at least eight years of relevant experience or equivalent, along with strong FPGA coding, DSP, software integration, Linux, C, and C++ capabilities. Applicants must hold an active TS/SCI clearance with polygraph; Vivado experience is required, and Epiq Solution PDK experience is preferred.