Senior FPGA Design Engineer - High-Speed Test Instruments

Cohu, Inc.; Norwood (MA); Vor Ort; USD 135.000 - 150.000; Vollzeit

Benefits dieser Stelle

401(k) with company matching

Employee Stock Purchase Plan

Tuition assistance

Disability & life insurance

Profit Sharing

Zusammenfassung

Cohu, Inc. in Norwood, MA is seeking a Senior FPGA Design Engineer with 7 to 15 years of experience to drive innovative FPGA solutions in the Semiconductor Test Group.

You will design high-speed FPGA implementations for digital, RF, and mixed-signal test instruments and collaborate with software and hardware teams to meet complex system requirements. Responsibilities include RTL design and simulation, system-level architecture, and integration of PCIe, DDR4/5, JESD, and memory subsystems, plus

Qualifikationen

• Minimum 7 years of RTL and FPGA experience.
• Proficiency in RTL design and simulation.
• Experience with AMD (Xilinx) or Altera tools.
• Simulation experience with Modelsim, VCS or Xcelium.
• Ability to work independently or in a team with minimal supervision.
• Attention to detail and high degree of accuracy.

Aufgaben

• Design FPGA solutions for semiconductor test instruments across multiple families.
• Collaborate with software and hardware engineers to integrate complete test instruments.
• Define system-level FPGA architecture and translate requirements to RTL implementations.
• Handle high-speed interfaces and memory subsystems (JESD, PCIe, DDR4/5).
• Generate technical documentation and reports; support lab bring-up and manufacturing.

Kenntnisse

RTL design

FPGA development

Self-motivation

Attention to detail

Team collaboration

Python

C/C++

Ausbildung

BS/MS/PhD in Electrical Engineering or related field

Tools

Modelsim

VCS

Xcelium

Xilinx/Altera toolchains

Jobbeschreibung

Cohu, Inc. in Norwood, MA is seeking a Senior FPGA Design Engineer with 7 to 15 years of experience to drive innovative FPGA solutions in the Semiconductor Test Group.

You will design high-speed FPGA implementations for digital, RF, and mixed-signal test instruments and collaborate with software and hardware teams to meet complex system requirements. Responsibilities include RTL design and simulation, system-level architecture, and integration of PCIe, DDR4/5, JESD, and memory subsystems, plus