Senior FPGA/ASIC Verification Engineer - DO-254 AEH

Prattwhitney; Cedar Rapids (IA); On-site; USD 86,800 - 165,200; Full time

Benefits offered by this job

Medical, dental, and vision insurance

Three weeks of vacation

401(k) plan with employer matching

Job summary

Prattwhitney is seeking an experienced Avionics FPGA/ASIC Engineer in Cedar Rapids, IA. The role requires expertise in design verification and simulation for ASIC, FPGA, and SoPC in safety-critical environments.

The ideal candidate will develop verification plans, mentor junior engineers, and work collaboratively across engineering teams. Benefits include a competitive salary range of $86,800 – $165,200, medical insurance, and relocation assistance.

Qualifications

• Minimum 5 years of relevant experience or an advanced degree in a related field.
• Hands-on experience with verification and simulation tools.
• Ability to work independently and collaboratively.

Responsibilities

• Develop verification plans based on requirements capture.
• Architect and implement advanced verification environments.
• Generate DO-254 DAL-A verification artifacts.

Skills

Design verification for ASIC/FPGA

SystemVerilog

Experience with digital hardware

Mentoring junior engineers

Scripting languages (Python, C/C++)

Education

Degree in STEM (Bachelor or higher)

Tools

Questasim

Vivado

Libero

Synplify Pro

Job description

Prattwhitney is seeking an experienced Avionics FPGA/ASIC Engineer in Cedar Rapids, IA. The role requires expertise in design verification and simulation for ASIC, FPGA, and SoPC in safety-critical environments.

The ideal candidate will develop verification plans, mentor junior engineers, and work collaboratively across engineering teams. Benefits include a competitive salary range of $86,800 – $165,200, medical insurance, and relocation assistance.