Senior ASIC/FPGA Verification Engineer Onsite

Prattwhitney; Cedar Rapids (IA); On-site; USD 90,000 - 120,000; Full time

Benefits offered by this job

Medical, dental, and vision insurance

Three weeks of vacation

Generous 401(k) plan

Job summary

Prattwhitney in Cedar Rapids, IA seeks a Senior Electrical or Computer Engineer to verify environment architecture and design using SystemVerilog. The ideal candidate will have strong experience in ASIC/FPGA and excellent communication skills.

Responsibilities include creating test plans, developing testbenches, and providing technical leadership for verification teams. Competitive benefits include medical insurance, vacation, and a 401(k) plan.

Qualifications

• Typically requires a degree in STEM and minimum 5 years of relevant experience.
• Active U.S. government-issued security clearance needed before start date.
• U.S. citizenship is required.

Responsibilities

• Verify environment architecture and design using SystemVerilog with OVM/UVM.
• Create written test plans and test cases for coding.
• Develop testbenches for verification of RTL blocks.

Skills

ASIC/FPGA experience with RTL coding

VHDL or Verilog knowledge

SystemVerilog and verification methodologies

Strong written and verbal communication skills

Working knowledge of Unix/Linux environments

Education

Degree in Science, Technology, Engineering or Mathematics (STEM)

Tools

QuestaSim

Quartus

Vivado

Job description

Prattwhitney in Cedar Rapids, IA seeks a Senior Electrical or Computer Engineer to verify environment architecture and design using SystemVerilog. The ideal candidate will have strong experience in ASIC/FPGA and excellent communication skills.

Responsibilities include creating test plans, developing testbenches, and providing technical leadership for verification teams. Competitive benefits include medical insurance, vacation, and a 401(k) plan.