Senior FPGA Verification Engineer for Avionics and Defense

Ursa Major; Berthoud (CO); On-site; USD 120,000 - 150,000; Full time

Benefits offered by this job

Unlimited PTO

Parental leave

Medical Insurance

Dental Insurance

Vision Insurance

401k with company match

Equity grants

Job summary

Ursa Major in Colorado is seeking a Senior ASIC/FPGA Verification Engineer to architect, develop and execute test benches for ASIC/FPGA verification within the Avionics team. You will verify requirements, collect coverage metrics and prepare design review materials, collaborating across disciplines to ensure robust pre- and post-silicon validation.

Colorado law requires base compensation between $120,000 and $150,000.

Qualifications

• 5+ years of experience with SystemVerilog UVM or similar verification methodology
• Experience with COCOTB and Python-based HDL simulations
• Experience running ASIC/FPGA simulations using QuestaSim, VCS, Riviera-Pro or Verilator
• Experience collecting ASIC/FPGA coverage metrics
• Experience defining test plans, generating test cases and testbench components
• Experience writing VHDL, Verilog or SystemVerilog code for ASIC/FPGA design
• Experience Python scripting, simulations and tool development

Responsibilities

• Architect and generate ASIC/FPGA test benches
• Generate test cases and run simulations to verify the functionality of ASIC/FPGA code
• Test on target hardware as part of post-silicon validation or HIL
• Collect functional and code coverage metrics
• Validate and verify ASIC/FPGA requirements
• Help debug ASIC/FPGA design and test issues
• Prepare materials for peer reviews and major program reviews

Skills

SystemVerilog UVM

PyUVVM

COCOTB

Python

QuestaSim

VCS

Verilator

RSI/Verilog/VHDL

Tools

QuestaSim

VCS

Riviera-Pro

Verilator

Job description

Ursa Major in Colorado is seeking a Senior ASIC/FPGA Verification Engineer to architect, develop and execute test benches for ASIC/FPGA verification within the Avionics team. You will verify requirements, collect coverage metrics and prepare design review materials, collaborating across disciplines to ensure robust pre- and post-silicon validation.

Colorado law requires base compensation between $120,000 and $150,000.