Senior FPGA/ASIC Design Engineer for Digital Systems

Johnson Service Group, Inc.; Austin (TX); On-site; USD 120,000 - 170,000; Full time

Benefits offered by this job

Medical, Dental, Vision insurance

401(k)

Weekly pay

Short-term disability

Job summary

Johnson Service Group, Inc. is seeking an experienced ASIC/FPGA design engineer in Austin, Texas to lead design and verification efforts for digital ASICs and FPGAs. The role requires HDL proficiency (VHDL/Verilog/SystemVerilog), Linux development experience, and strong verification/test bench skills.

You will collaborate with systems, firmware, architecture, and product engineering, performing timing and signoff analysis, and supporting lab integration to ensure robust implementations.

Qualifications

• 7+ years in ASIC design and implementation
• Experience with FPGA & ASIC design
• Proficiency in HDL programming (VHDL, Verilog, SystemVerilog)
• Experience with Linux development environment
• Experience with design verification and test bench development

Responsibilities

• Design and develop digital ASICs and FPGAs, and/or mixed-signal ASICs
• Implement designs using HDL (VHDL, Verilog, SystemVerilog)
• Develop verification methodologies and test benches for block and system-level verification
• Create and execute test plans, develop test harnesses, and implement coverage models
• Conduct timing analysis, noise analysis, and other signoff checks
• Collaborate with cross-functional teams (systems, firmware, architecture, product engineering)
• Support lab integration and troubleshooting
• Resolve design issues and drive timing/congestion solutions

Skills

ASIC design

HDL programming

Linux development

Design verification

Test bench development

Timing analysis

Education

Bachelor's degree in Electrical Engineering or Computer Engineering

Tools

RTL2GDSII

Job description

Johnson Service Group, Inc. is seeking an experienced ASIC/FPGA design engineer in Austin, Texas to lead design and verification efforts for digital ASICs and FPGAs. The role requires HDL proficiency (VHDL/Verilog/SystemVerilog), Linux development experience, and strong verification/test bench skills.

You will collaborate with systems, firmware, architecture, and product engineering, performing timing and signoff analysis, and supporting lab integration to ensure robust implementations.