Senior FGPA-ASIC Design Engineer

Johnson Service Group, Inc.

Austin (TX)

On-site

USD 120,000 - 170,000

Full time

2 days ago
Be an early applicant
Application generator

A complete application in a minute — tailored resume and cover letter, ready to send.

Get past ATS filters

Benefits offered by this job

Medical, Dental, Vision insurance
401(k)
Weekly pay
Short-term disability

Job summary

Johnson Service Group, Inc. is seeking an experienced ASIC/FPGA design engineer in Austin, Texas to lead design and verification efforts for digital ASICs and FPGAs. The role requires HDL proficiency (VHDL/Verilog/SystemVerilog), Linux development experience, and strong verification/test bench skills.

You will collaborate with systems, firmware, architecture, and product engineering, performing timing and signoff analysis, and supporting lab integration to ensure robust implementations.

Qualifications

  • 7+ years in ASIC design and implementation
  • Experience with FPGA & ASIC design
  • Proficiency in HDL programming (VHDL, Verilog, SystemVerilog)
  • Experience with Linux development environment
  • Experience with design verification and test bench development

Responsibilities

  • Design and develop digital ASICs and FPGAs, and/or mixed-signal ASICs
  • Implement designs using HDL (VHDL, Verilog, SystemVerilog)
  • Develop verification methodologies and test benches for block and system-level verification
  • Create and execute test plans, develop test harnesses, and implement coverage models
  • Conduct timing analysis, noise analysis, and other signoff checks
  • Collaborate with cross-functional teams (systems, firmware, architecture, product engineering)
  • Support lab integration and troubleshooting
  • Resolve design issues and drive timing/congestion solutions

Skills

ASIC design
HDL programming
Linux development
Design verification
Test bench development
Timing analysis

Education

Bachelor's degree in Electrical Engineering or Computer Engineering

Tools

RTL2GDSII

Job description

Job Description

Key Responsibilities: Design and develop digital ASICs and FPGAs, and/or mixed-signal ASICs Implement designs using HDL (VHDL, Verilog, and/or SystemVerilog) Develop verification methodologies and test benches for block and system-level verification Create and execute test plans, develop test harnesses, and implement coverage models Conduct timing analysis, noise analysis, and other signoff checks Collaborate with cross-functional teams including systems, firmware, architecture, and product engineering Support lab integration and troubleshooting activities Resolve design issues and drive solutions for timing, congestion, and other implementation challenges

Basic Qualifications: 7+ years of experience in ASIC design and implementation Bachelor's degree in Electrical Engineering, Computer Engineering, or related technical discipline Experience with FPGA & ASIC design Proficiency in HDL programming (VHDL, Verilog, and/or SystemVerilog) Experience with Linux development environment Experience with design verification and test bench development

Preferred Skills and Experience: Advanced degree (MS/PhD) in Electrical Engineering, Computer Engineering, or related field Experience in full ASIC/FPGA lifecycle (architecture, design, simulation, verification, validation, integration & test) Experience with Software-Defined Radio Architectures, ADC/DAC, and/or DSPs Knowledge of DSP and communications systems including spread spectrum, forward error correction, and modulation types (QPSK, QAM, PCM/FM, PAM) Strong object-oriented programming and scripting skills (Python, TCL, Perl) Experience with physical design flows and industry-standard EDA tools Experience with RTL2GDSII physical design and signoff flows Knowledge of deep sub-micron FinFET and CMOS technologies Experience with DFT/Scan/MBIST/LBIST methodologies Experience mentoring junior engineers

JSG offers medical, dental, vision, life insurance options, short-term disability, 401(k), weekly pay, and more. Johnson Service Group (JSG) is an Equal Opportunity Employer. JSG provides equal employment opportunities to all applicants and employees without regard to race, color, religion, sex, age, sexual orientation, gender identity, national origin, disability, marital status, protected veteran status, or any other characteristic protected by law.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Sr. Design Engineer
Sr. Design Engineer

Mavensoft Technologies, LLC • United States

Remote
CAD 120,000 - 150,000
Sr. Designer Engineer (ASIC/FPGA)
Sr. Designer Engineer (ASIC/FPGA)

Varstaff Staffing • El Segundo (CA)

Remote
USD 124,000 - 186,000
Senior FPGA/ASIC Design Engineer for Digital Systems
Senior FPGA/ASIC Design Engineer for Digital Systems

Johnson Service Group, Inc. • Austin (TX)

On-site
USD 120,000 - 170,000
Medical, Dental, Vision insurance
401(k)
Weekly pay
+1
Advanced ASIC FPGA Engineer
Advanced ASIC FPGA Engineer

Anysilicon • Pittsfield (MA), Northern (KY)

On-site
USD 120,000 - 170,000
Senior ASIC/FPGA Design Engineer - RTL to GDS
Senior ASIC/FPGA Design Engineer - RTL to GDS

Advanced Micro Devices, Inc. • San Jose (CA)

Hybrid
USD 150,000 - 190,000
AMD Benefits at a glance
Senior ASIC Digital / DSP Design Engineer
Senior ASIC Digital / DSP Design Engineer

Anysilicon • Colorado Springs (CO)

On-site
USD 150,000 - 190,000
ASIC FPGA Engineer – Entry Level
ASIC FPGA Engineer – Entry Level

Anysilicon • BLOOMINGTON (MN), Northern (KY)

On-site
USD 90,000 - 130,000
ASIC/FPGA Methodology Engineer
ASIC/FPGA Methodology Engineer

Insight Global • North Reading (MA)

On-site
USD 110,000 - 160,000
ASIC/FPGA Verification Engineer 5
ASIC/FPGA Verification Engineer 5

Cts Technology Solutions, Inc. • El Segundo (CA)

On-site
USD 120,000 - 190,000
Palladium emulators
Sr. Designer Engineer
Sr. Designer Engineer

Protingent • El Segundo (CA)

On-site
USD 158,000 - 186,000
Health insurance
401k plan
Paid time off (PTO)
+1