Senior FPGA Architect - Low-Latency Trading Systems

DRW Holdings, LLC.; City of Amsterdam (NY); Ibrido; USD 130.000 - 190.000; Tempo pieno

Descrizione del lavoro

DRW Holdings, LLC. seeks an Experienced FPGA Engineer to join a trading team in Chicago, NYC, London or Amsterdam.

You will lead FPGA application development across synthesis, timing, and verification, collaborating with software and trading groups to deliver high-throughput, low-latency solutions. Ideal candidates have 3+ years in FPGA hardware, strong RTL skills (Verilog/SystemVerilog), and experience with SOC architectures and TCP/IP.

Competenze

• Bachelor’s degree or higher in Computer/Electrical Engineering with 3+ years of FPGA hardware experience.
• Strong RTL design and verification using Verilog and SystemVerilog.
• Experience with FPGA design flow: synthesis, place & route, static timing analysis.
• Experience with SOC architectures, memory subsystems, networking.
• Knowledge of TCP/IP stack.
• Ability to lead FPGA projects from requirements to production.

Mansioni

• Architect and implement new FPGA applications (synthesis, place & route, static timing analysis) from the ground up.
• Research and evaluate a variety of cutting-edge FPGA hardware and technologies
• Propose creative solutions to overcome FPGA/hardware limitations
• Liaise directly with software, trading and other design teams
• Conduct lab debugging and characterization of new hardware
• Comfortable doing production support and live debugging
• Researching new techniques, tools and architectures

Conoscenze

FPGA design

Verilog

RTL verification

SystemVerilog

SOC architectures

TCP/IP

Synthesis / P&R

HW/SW co-design

Formazione

Bachelor's degree in Computer/Electrical Engineering

Strumenti

Xilinx FPGA tools

Altera/Intel FPGA tools

Place & Route tools

Descrizione del lavoro

DRW Holdings, LLC. seeks an Experienced FPGA Engineer to join a trading team in Chicago, NYC, London or Amsterdam.

You will lead FPGA application development across synthesis, timing, and verification, collaborating with software and trading groups to deliver high-throughput, low-latency solutions. Ideal candidates have 3+ years in FPGA hardware, strong RTL skills (Verilog/SystemVerilog), and experience with SOC architectures and TCP/IP.