Senior Engineer I- Design

Microchip Technology Inc.; Chandler (AZ); On-site; USD 110,000 - 150,000; Full time

Job summary

Microchip Technology Inc is seeking a Senior Engineer I – design to join our team in Chandler, AZ. The role focuses on RTL design (Verilog/SystemVerilog), functional verification, and contributing to next‑generation mixed‑signal and digital products.

AI/ML‑assisted design methodologies and software skills will enhance productivity and verification quality. The ideal candidate brings strong hardware design fundamentals, 5+ years of experience, and hands-on experience with industry EDA tools.

Qualifications

• BSEE with microelectronics emphasis required.
• 5 years of experience required.
• Proficiency in Verilog/SystemVerilog for RTL design.
• Experience with UVM-based verification environments.
• Understanding of digital design fundamentals: timing, synthesis constraints, clock domain crossings.
• Programming in Python; familiarity with TCL or shell scripting.
• Experience with industry EDA tools (Synopsys, Cadence, or Siemens).
• Masters in Electrical Engineering preferred.

Responsibilities

• Design, code, and optimize RTL (Verilog/SystemVerilog) for digital blocks and subsystems targeting ASIC implementation.
• Develop and execute verification plans using UVM/SystemVerilog-based testbenches.
• Write constrained-random and directed tests to achieve functional and code coverage targets.
• Apply AI/ML techniques to improve verification closure, coverage analysis, regression optimization, and bug triaging.
• Develop scripts and automation tools (Python, TCL) to streamline design and verification workflows.
• Collaborate with architecture, analog, physical design, and software teams to ensure design correctness and integration.
• Perform lint, CDC, and synthesis checks; resolve issues through the design cycle.
• Participate in design reviews, specification development, and documentation.

Skills

Verilog

SystemVerilog

Python

UVM-based verification

Design verification

Education

BSEE with course emphasis on microelectronics

Master's in Electrical Engineering

Tools

TCL

Shell scripting

EDA tools (Synopsys/Cadence/Siemens)

Job description

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi‑billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally‑recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values‑based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.

Job Description

We are seeking a Senior Engineer I – design to join our team. This role involves RTL design, functional verification, and contributing to next‑generation mixed‑signal and digital products. The ideal candidate combines strong hardware design fundamentals with modern AI/ML‑assisted design methodologies and software skills to improve design productivity and verification quality.

Responsibilities

• Design, code, and optimize RTL (Verilog/SystemVerilog) for digital blocks and subsystems targeting ASIC implementation
• Develop and execute verification plans using UVM/SystemVerilog‑based testbenches
• Write constrained‑random and directed tests to achieve functional and code coverage targets
• Apply AI/ML techniques to improve verification closure, coverage analysis, regression optimization, and bug triaging
• Develop scripts and automation tools (Python, TCL) to streamline design and verification workflows
• Collaborate with architecture, analog, physical design, and software teams to ensure design correctness and integration
• Perform lint, CDC, and synthesis checks; resolve issues through the design cycle
• Participate in design reviews, specification development, and documentation

Requirements/Qualifications

• BSEE with course emphasis on microelectronics and 5 years of experience required.
• Proficiency in Verilog and/or SystemVerilog for RTL design
• Experience with UVM‑based verification environments
• Understanding of digital design fundamentals: timing, synthesis constraints, clock domain crossings
• Programming skills in Python; familiarity with TCL or shell scripting
• Experience with industry EDA tools (Synopsys, Cadence, or Siemens) will be plus.

Preferred Qualifications

• Masters in Electrical Engineering

Travel Time

0% - 25%

Physical Attributes

Hearing, Seeing, Talking, Works Around Others

Physical Requirements

80% Sitting, 10% Standing, 10% Walking

Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.

For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.