Engineer II-Design

FHLB Des Moines; Allentown (Lehigh County); On-site; USD 90,000 - 120,000; Full time

Job summary

Microchip Technology Inc. is seeking an experienced RTL/ASIC designer to design, simulate, and verify RTL blocks for SOC devices. You will work on high-speed interfaces, timing closure, and verification across pre-layout and post-layout stages.

The role requires 2–5 years in RTL for ASIC, strong SystemVerilog, and scripting/linux skills. FPGA/test board experience is a plus; travel may be required. Join a collaborative hardware engineering team and contribute to next-generation devices.

Qualifications

• 2-5 years of experience in RTL design for ASIC implementation.
• Bachelor's in Electrical Engineering, Computer Engineering, or Computer Science.
• Design courses and practical application of course learning for high-speed RTL design.
• Experience with RTL design tools that include design entry, synthesis, formal verification, RTL/gate level simulation, cross-domain clocking analysis and static timing analysis.
• Proficiency in SystemVerilog development languages.
• Proficiency in scripting languages (TCL / Perl / Python) and Linux.
• Ability to understand and implement industry standards.
• Ability to write detailed design specifications.
• Good analytical, oral and written communication skills.
• Self-motivated, proactive team player.
• Preferred: Master’s in Electrical Engineering, Computer Engineering, or Computer Science.
• FPGA and ASIC System On Chip design experience.
• Lab experience for system-level validation.

Responsibilities

• General RTL and ASIC development.
• Detailed module design, performance analysis and detailed design specification creation.
• Participate in the RTL implementation, synthesis, simulation, pre-layout/post-layout timing verification.
• Understanding of emerging high speed design techniques to improve Data & Command processing bandwidth, reduce latencies & increase reliability.
• Support porting the design into test chips and emulation platforms – experience with FPGA design and board implementation tools is advantageous.

Skills

RTL design

ASIC design

SystemVerilog

TCL

Perl

Python

Linux

Formal verification

RTL simulation

Static timing

Cross-domain clocking

Lab experience

Communication

Education

Bachelors in EE/CE/CS

Tools

FPGA

Synthesis tools

Job description

Job Description

As a member of Microchip’s engineering community, your primary responsibility will be to design, simulate, and verify various RTL-based blocks on our devices. Microchip’s designs are an SOC with various hard and soft IP blocks that support many industry standard protocols for Imaging, Networking System Connectivity, Compute and Data Storage.

Responsibilities

• General RTL and ASIC development.
• Detailed module design, performance analysis and detailed design specification creation.
• Participate in the RTL implementation, synthesis, simulation, pre-layout/post-layout timing verification.
• Understanding of emerging high speed design techniques to improve Data & Command processing bandwidth, reduce latencies & increase reliability.
• Support porting the design into test chips and emulation platforms – experience with FPGA design and board implementation tools is advantageous.

Qualifications

• 2-5 years of experience in RTL design for ASIC implementation.
• Bachelor’s in Electrical Engineering, Computer Engineering, or Computer Science.
• Design courses and practical application of course learning for high-speed RTL design.
• Experience with RTL design tools that include design entry, synthesis, formal verification, RTL/gate level simulation, cross-domain clocking analysis and static timing analysis.
• Proficiency in SystemVerilog development languages.
• Proficiency in scripting languages (TCL / Perl / Python) and Linux.
• Ability to understand and implement industry standards.
• Ability to write detailed design specifications.
• Good analytical, oral and written communication skills.
• Self-motivated, proactive team player.
• Preferred: Master’s in Electrical Engineering, Computer Engineering, or Computer Science.
• FPGA and ASIC System On Chip design experience.
• Lab experience for system-level validation.

Additional Requirements

U.S. Export Controls: This position requires access to technology controlled by U.S. export laws. Candidates must be U.S. citizens, permanent residents, or classified as a protected individual as defined in 8 USC 1324b(a)(3).

Travel: 0% - 25%.

Physical Requirements

100% inside, 80% sitting, 10% standing, 10% walking. Hearing, seeing, talking, works alone or with others.

Equal Opportunity

Microchip Technology Inc is an equal‑opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected veteran status, age, or any other characteristic protected by law.