Technical Staff Engineer - Verification

Microchip Technology Inc.

San Jose (CA)

On-site

USD 91,000 - 232,000

Full time

14 days+

Get more replies from employers

Send a job-specific resume in minutes.

Benefits offered by this job

Health benefits
Retirement savings plans
Quarterly bonus payments
ESPP program with a 2-year look-back feature

Job summary

A leading technology firm in California is looking for a highly experienced engineer specializing in the verification of complex System-on-Chip (SoC) designs. The ideal candidate will have over 12 years of experience using advanced verification methodologies, including System Verilog and UVM. Key responsibilities include developing reusable test benches, collaborating with diverse teams, and mentoring junior members. Competitive compensation includes a range of $91,000 - $232,000 and benefits from day one.

Qualifications

  • 12+ years in functional verification of complex SoC designs.
  • Expertise in System Verilog, UVM, formal verification methodologies.
  • Proven experience in methodology development and tool automation.

Responsibilities

  • Verification of complex subsystems and SoC using verification methodologies.
  • Develop and maintain UVM-based test benches and environments.
  • Collaborate with architecture and design teams for successful execution.

Skills

Functional verification of complex SoC designs
System Verilog
UVM
Formal verification methodologies
AI/ML-driven EDA tools
Scripting in Python
Scripting in TCL/TK
C/C++ automation
Excellent debug skills
Collaboration skills

Education

BS or MS in Electrical/Electronic Engineering

Tools

Siemens verification suites
Cadence verification suites
Synopsys verification suites
Revision control systems (Git, Perforce, svn)

Job description

Overview

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? Microchip Technology Inc. offers all that and more. Our culture supports growth and stability, challenges you, and provides a wide range of products and solutions with unlimited career potential. Microchip’s Leadership Passage Programs support career growth and enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and a strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System. It’s won us awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo. We have a track record of revenue growth and profitability, driven by a team focused on empowering innovation.

Visit our careers page to see what exciting opportunities and company perks await!

Key Responsibilities
  • Verification of complex subsystems and SoC using an optimal combination of constrained random, formal and C-based verification methodologies.
  • Develop and maintain highly reusable UVM-based test benches and verification environments.
  • Involve in RTL, power-aware and gate-level verification.
  • Contribute to quality and productivity by using AI/ML-enabled verification methodologies.
  • Collaborate with emulation and hardware prototyping teams to define a unified verification methodology.
  • Collaborate with architecture and design teams to ensure seamless execution and first-silicon success.
  • Mentor junior team members.
Qualifications
Required Qualifications:
  • 12+ years in functional verification of complex SoC designs
  • Expertise in System Verilog, UVM, formal verification methodologies
  • Proven experience in methodology development and tool automation
  • Familiarity with AI/ML-driven EDA tools and scripting for flow integration
  • Good understanding of SoC architectures – ARM/RISC-V
  • Expertise in at least two of the following domains/peripherals:
    • CPU subsystems
    • PCIe Gen3/Gen4/Gen5
    • DDR4/DDR5, LPDDR4X
    • MIPI DSI/CSI
    • Ethernet MAC
    • USB
    • Security and cryptography IPs
  • Exposure to emulation, hardware prototyping and post-silicon debug
  • Experience with FPGA-based acceleration platforms and simulation/emulation flows
  • Software & Scripting: Python, TCL/TK, and C/C++ for automation and validation
  • Tools: Familiarity with Siemens/Cadence/Synopsys verification suites
  • Revision control systems (Git, Perforce, svn)
  • Excellent debug skills
  • Experience working with global cross-functional teams
  • Excellent communication and collaboration skills
Preferred Skills
  • Strong understanding of FPGA architecture
  • Experience with coverage-driven verification using ML-based optimizations
  • Experience in emulation, hardware prototyping and post-silicon debug
  • Knowledge and exposure to complete SOC RTL to GDS to silicon release flow
Education
  • BS or MS in Electrical/Electronic Engineering with 12+ years of experience
Travel

0% - 25%

Physical Attributes & Requirements

Hearing, Seeing, Talking, Works Alone, Works Around Others

80% sitting, 10% walking, 10% standing

Pay Range

We offer a total compensation package that ranks among the best in the industry. It includes base pay, restricted stock units, and quarterly bonus payments. Benefits begin on day one, including health benefits, retirement savings plans, and an ESPP program with a 2-year look-back feature. The annual base salary range for this position is $91,000 - $232,000. Range depends on location, skills and experience.

Equal Opportunity

Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law. For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.

Agency Notice

To all recruitment agencies: Microchip Technology Inc does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Technical Staff Engineer - Verification
Technical Staff Engineer - Verification

Microchip Technology Inc • Chandler (AZ)

On-site
USD 91,000 - 232,000
Sr. Manager, SOC Verification
Sr. Manager, SOC Verification

Microchip Technology Inc • Chandler (AZ)

On-site
USD 91,000 - 247,000
Health benefits from day one
ESPP with 2-year look-back
RSUs
+1
Senior Engineer I- Design
Senior Engineer I- Design

Microchip Technology Inc. • Chandler (AZ)

On-site
USD 110,000 - 150,000
Senior Technical Staff Engineer - Validation (System Design)
Senior Technical Staff Engineer - Validation (System Design)

Microchip • San Jose (CA)

On-site
USD 70,304 - 143,000
Wellness & medical benefits
Restricted stock grant
Employee stock purchase plan
+3
Senior Technical Staff Engineer - Validation (System Design)
Senior Technical Staff Engineer - Validation (System Design)

Microchip • California (MO)

On-site
USD 70,000 - 143,000
Medical benefits
401K
RSU
+1
Senior Technical Staff Engineer - Validation (System Design)
Senior Technical Staff Engineer - Validation (System Design)

Microchip Technology Inc. • San Jose (CA)

On-site
USD 91,000 - 232,000
Technical Staff Engineer - Applications
Technical Staff Engineer - Applications

Microchip Technology Inc. • Hauppauge (NY)

On-site
USD 91,000 - 232,000
Health benefits day one
ESPP program
Retirement plan
Senior Technical Staff Engineer - Validation (System Design)
Senior Technical Staff Engineer - Validation (System Design)

Microchip Technology Inc • San Jose (CA)

On-site
USD 91,000 - 232,000
Health benefits from day one
Quarterly bonus payments
Retirement savings plans
+1
Sr Engineer I - Validation (Systems)
Sr Engineer I - Validation (Systems)

Microchip Technology Inc. • Roseville (CA)

On-site
USD 70,000 - 205,000
Health benefits day one
ESPP program with 2-year look back
Retirement savings plan
Sr Engineer I - Validation (Systems)
Sr Engineer I - Validation (Systems)

FHLB Des Moines • Roseville (CA)

On-site
USD 70,000 - 205,000
Health benefits from day one
Retirement savings plan
Employee stock purchase plan (ESPP)