Senior DRAM Design Verification Engineer

Micron; Boise (ID); On-site; USD 110,000 - 160,000; Full time

Benefits offered by this job

Medical, dental and vision

Paid time off

Paid holidays

Family leave

Job summary

Micron Technology in Boise, Idaho is seeking a Design Verification Engineer to verify and optimize digital and analog circuit designs for next-generation memory technologies. You will collaborate with global teams across the product lifecycle to deliver high-quality, manufacturable memory solutions.

The role emphasizes verification planning, coverage, debugging, and silicon correlation, using SPICE, Verilog, and EDA tools from Synopsys and Cadence.

Qualifications

• Bachelor’s degree in Electrical Engineering or related field.
• 4+ years in semiconductor design, verification, or development.
• Experience with verification planning, coverage strategies, debug, and silicon correlation.
• Experience with SPICE and Verilog modeling and simulation.
• Knowledge of digital and analog circuit design methodologies and tools such as Synopsys and Cadence Virtuoso.

Responsibilities

• Verify circuit functionality, reliability, power, and compliance with product specifications
• Drive verification planning, coverage closure, circuit debug, and design improvements
• Perform circuit modeling and simulation using industry-standard tools
• Support silicon validation, reticle experiments, and tape-out activities
• Partner with engineering, manufacturing, and product teams to deliver manufacturable designs

Skills

Verification planning

Coverage strategies

Debug

Silicon correlation

SPICE

Verilog

Synopsys Cadence Virtuoso

UVM

Education

Bachelor’s degree in Electrical Engineering

Master’s degree in Electrical Engineering

Tools

Synopsys

Cadence Virtuoso

UVM

Job description

Micron Technology in Boise, Idaho is seeking a Design Verification Engineer to verify and optimize digital and analog circuit designs for next-generation memory technologies. You will collaborate with global teams across the product lifecycle to deliver high-quality, manufacturable memory solutions.

The role emphasizes verification planning, coverage, debugging, and silicon correlation, using SPICE, Verilog, and EDA tools from Synopsys and Cadence.