Senior DRAM Design Engineer: Memory & Verification Lead

1000 Micron Technology, Inc.; Boise (ID); On-site; USD 80,000 - 100,000; Full time

Benefits offered by this job

Medical, dental, and vision plans

Paid family leave

Robust paid time-off program

Job summary

1000 Micron Technology, Inc. in Boise, Idaho is seeking an experienced Semiconductor Designer to contribute to new product opportunities. You will lead layout processes and work with various engineering groups to ensure manufacturability.

The ideal candidate has a BSEE or MSEE, at least 4 years of relevant experience, and strong knowledge of integrated circuits using SPICE and Verilog. Benefits include health plans and paid time off.

Qualifications

• Minimum of 4 years of relevant Semiconductor Design and Development experience.
• 5+ years of demonstrated ability in mixed design and product engineering.
• 3+ years of proven experience in parasitic modeling, design validation, reticle experiments, and tape-out revisions.

Responsibilities

• Contribute to the development of new product opportunities.
• Lead the layout process including floor-planning, placement, and routing.
• Work with multiple engineering groups to ensure product manufacturability.

Skills

Modeling and simulation using SPICE

Integrated circuit design

Mol.ing knowledge of Synopsys

Memory technology design

Education

BSEE or MSEE in Electrical Engineering

Tools

Verilog

Cadence Virtuoso

Job description

1000 Micron Technology, Inc. in Boise, Idaho is seeking an experienced Semiconductor Designer to contribute to new product opportunities. You will lead layout processes and work with various engineering groups to ensure manufacturability.

The ideal candidate has a BSEE or MSEE, at least 4 years of relevant experience, and strong knowledge of integrated circuits using SPICE and Verilog. Benefits include health plans and paid time off.