Senior DRAM Design Architect

Micron Technology, Inc; Richardson (TX); On-site; USD 150,000 - 230,000; Full time

Job summary

Micron Technology, Inc. seeks a Principal Memory Design Engineer in Richardson, Texas to architect and deliver high-performance DRAM circuits for advanced technology nodes.

You will lead cross-functional teams on floorplanning, routing, power delivery, and verification, influencing performance, power, reliability, and time-to-market for next-generation memory products. You will drive circuit simulations, parasitic models, and layout-to-silicon correlation, while coordinating with design, test,

Qualifications

• BS in Electrical Engineering or related field with advanced CMOS, VLSI, analog coursework.
• Strong hands-on Cadence Virtuoso, physical layout, and floorplanning experience.
• Experience using FINESIM, HSPICE, and VERILOG for complex circuit simulations.
• Demonstrated ability to solve ambitious technical problems with significant design impact.
• Deep knowledge of DRAM subsystem architecture, operation, or building.

Responsibilities

• Design and optimize DRAM circuits spanning digital, analog, and memory core subsystems to meet power, performance, and reliability targets.
• Develop and refine floorplans, routing strategies, power delivery, sense margins, timings, and die-size tradeoffs.
• Perform advanced circuit simulations and analyze speed, power, noise, and long-term reliability.
• Model parasitics, verify power and signal integrity, and support validation and tape-out revisions.
• Lead technical reviews and standardize best practices across design and layout teams.

Skills

Cadence Virtuoso

Layout & floorplanning

Circuit simulation

DRAM architecture

Education

BS in Electrical Engineering

MS/PhD preferred

Tools

FINESIM

HSPICE

VERILOG

Job description

Micron Technology, Inc. seeks a Principal Memory Design Engineer in Richardson, Texas to architect and deliver high-performance DRAM circuits for advanced technology nodes.

You will lead cross-functional teams on floorplanning, routing, power delivery, and verification, influencing performance, power, reliability, and time-to-market for next-generation memory products. You will drive circuit simulations, parasitic models, and layout-to-silicon correlation, while coordinating with design, test,