Senior Digital IP Verification Leader

NXP Semiconductors; Austin (TX); Hybrid; USD 120,000 - 155,000; Full time

Job summary

NXP Semiconductors in Austin, TX is seeking a senior verification engineer for MCU/MPU Digital IP teams. You will define verification plans, develop testbenches, and lead a small team to deliver high-quality IP verified with advanced methodologies.

The role requires strong SystemVerilog/UVM experience, formal methods, and scripting for automation. Hybrid work in Austin is supported along with collaboration across global teams.

Qualifications

• BS EE or MS EE with semiconductor industry experience or PhD with related experience.
• Strong knowledge of verification methodologies and testbench construction.
• Experience with Verilog/SystemVerilog, UVM, and formal verification methods.

Responsibilities

• Drive verification plans and develop/maintain testbenches and components.
• Mentor and guide a small verification team.
• Collaborate with SoC/IP teams to implement best practices.

Skills

Verilog

SystemVerilog

UVM

Formal verification

Python scripting

FPGA emulation

Power mgmt concepts

Debugging

Education

BSEE with 8+ yrs

Tools

HAPS

Palladium

Zebu

CPF/UPF

VHDL

UNIX/Linux

Job description

NXP Semiconductors in Austin, TX is seeking a senior verification engineer for MCU/MPU Digital IP teams. You will define verification plans, develop testbenches, and lead a small team to deliver high-quality IP verified with advanced methodologies.

The role requires strong SystemVerilog/UVM experience, formal methods, and scripting for automation. Hybrid work in Austin is supported along with collaboration across global teams.