Senior Digital ASIC Designer — High-Impact Hardware, Onsite Cambridge

Draper Labs; Cambridge (MA); On-site; USD 82,300 - 220,000; Full time

Benefits offered by this job

Workplace flexibility

Employee clubs

Health/finance workshops

Off-site social events

Local museum discounts

Job summary

Draper is seeking a Senior Digital ASIC Designer to create high‑performance digital ASICs from RTL through synthesis, collaborating with cross‑functional teams in Cambridge, MA. The role emphasizes rigorous architectural and implementation work across advanced nodes.

Requires 7–10 years with a bachelor’s degree or 5–10 years with a master’s; on‑site work in Cambridge and active US secret clearance. Base salary ranges widely with strong total compensation potential.

Qualifications

• Requires a bachelor’s degree in Engineering or related field; Master’s preferred.
• 7–10 years of experience with a bachelor’s degree, or 5–10 years with a master’s degree in ASIC hardware engineering or related fields.

Responsibilities

• Design and simulate transistor-level circuits to implement architecture and requirement specifications
• Contribute to system-level design
• Optimize hardware designs for performance, power, and cost
• Evaluate the feasibility of complex algorithms and requirements
• Contribute independently to complex chip architectures and designs
• Drive solutions to complex problems, develop requirements, and adapt when customer requirements are unclear or incomplete
• Contribute to business development and proposal activities
• Develop, document, and teach best practices to less experienced engineers
• Perform or guide physical layout, including floor-planning, and simulate circuits using extracted parasitics; contribute to design-for-test development
• Perform other duties as assigned

Skills

IC design

SystemVerilog/Verilog/VHDL

Cadence/Synopsys

Team leadership

communication

problem solving

time management

Education

Bachelor's in Engineering

Master's preferred

Tools

Cadence

Synopsys

Job description

Draper is seeking a Senior Digital ASIC Designer to create high‑performance digital ASICs from RTL through synthesis, collaborating with cross‑functional teams in Cambridge, MA. The role emphasizes rigorous architectural and implementation work across advanced nodes.

Requires 7–10 years with a bachelor’s degree or 5–10 years with a master’s; on‑site work in Cambridge and active US secret clearance. Base salary ranges widely with strong total compensation potential.