Senior DFT Test Engineer — Scan/ATPG Specialist

Arrow Electronics; San Jose (CA); On-site; USD 112,000 - 171,000; Full time

Job summary

Arrow Electronics in San Jose, CA is seeking a Design For Test Engineer IV to lead DFT deliverables and debug complex timing and simulation issues. You will insert scans, manage JTAG/ATPG, and collaborate with cross-site design teams to implement robust test methodologies.

The role demands deep expertise, independent problem solving, and the ability to drive best practices in DFT and related tools while interfacing with clients and internal teams to meet project objectives.

Qualifications

• Requires deep knowledge of DFT concepts and test methodologies.
• Strong debugging skills for timing/ SDF and simulation issues.
• Experience coordinating with cross-site design teams.

Responsibilities

• Lead scan insertion, JTAG, ATPG, DRC and coverage analysis.
• Debug root cause of simulation failures and deliver DFT results to customers.
• Collaborate across sites to define and implement best practices in DFT.

Skills

DFT expertise

JTAG

ATPG

Simulation debugging

Education

Bachelor's degree in Electrical Engineering

Tools

EDA tools

Job description

Arrow Electronics in San Jose, CA is seeking a Design For Test Engineer IV to lead DFT deliverables and debug complex timing and simulation issues. You will insert scans, manage JTAG/ATPG, and collaborate with cross-site design teams to implement robust test methodologies.

The role demands deep expertise, independent problem solving, and the ability to drive best practices in DFT and related tools while interfacing with clients and internal teams to meet project objectives.