Senior DFT RTL Design Engineer - GPUs (Hybrid)

Intel Corporation; Santa Clara (CA); Hybrid; USD 142,000 - 173,000; Full time

Benefits offered by this job

Stock bonuses

Health benefits

Retirement plan

Vacation

Job summary

Intel is seeking a Senior DFT Design Engineer to join the GHI group in the US. You will work on RTL/GLS validation, ATPG, and pattern generation for graphics IP and GPU blocks, ensuring high-quality integration in full chip designs.

You will participate in architecture/microarchitecture discussions and optimize logic for power, performance, and timing while supporting debug and post-silicon activities for the GPU block.

Qualifications

• Bachelors/Masters/PhD in Electrical or Computer Engineering or related STEM with required years of experience.
• Experience with Scan, ATPG or other DFT features.
• SoC or IP DFT design, integration or verification.
• EDA tools such as Siemens Tessent or other ATPG tools, VCS and/or other simulation or debug tools.

Responsibilities

• Design RTL/GLS and validate for graphics IPs and GPU blocks.
• Develop RTL/code for graphics IPs and contribute to ATPG content.
• Review verification plans and ensure correct verification across hierarchies.
• Support SoC customers to ensure high-quality GPU integration.

Skills

Scan & ATPG

DFT design

SoC IP DFT

RTL/GLS validation

Education

Bachelor's/Master's/PhD in Electrical or Computer Engineering

Tools

Siemens Tessent

VCS

Job description

Intel is seeking a Senior DFT Design Engineer to join the GHI group in the US. You will work on RTL/GLS validation, ATPG, and pattern generation for graphics IP and GPU blocks, ensuring high-quality integration in full chip designs.

You will participate in architecture/microarchitecture discussions and optimize logic for power, performance, and timing while supporting debug and post-silicon activities for the GPU block.