Senior DFT Methodology Engineer | Equity Eligible

NVIDIA AI; Santa Clara (CA); On-site; USD 168,000 - 311,000; Full time

Benefits offered by this job

Equity

Benefits package

Job summary

NVIDIA is seeking a DFT Methodology Engineer in Santa Clara to lead cutting-edge DFT architectures across complex SoCs. You will collaborate with RTL, timing, physical design, software, bring-up, and production teams to define and deploy robust DFT methodologies and test flows.

You will mentor junior engineers on design choices, cost, and quality, while ensuring security considerations in DFT and hardware systems. The role emphasizes cross-functional impact and innovation.

Qualifications

• Master’s degree in Electrical Engineering or related field with DFT experience.
• 10+ years of hands-on SoC architecture, RTL design, and verification.
• Strong analytical skills in verification/validation of test patterns on complex multi-million gate designs.
• Experience in cross-functional RTL, clocks, STA, place-n-route, and power trade-offs.
• Experience in silicon debug and bring-up on ATE with understanding of pattern formats and failure processing.
• Knowledge of DFT security and hardware security is a plus.
• Excellent written and oral interpersonal skills.

Responsibilities

• Own and implement state-of-the-art DFT architectures across blocks.
• Develop and deploy DFT methodologies for RTL design and validation.
• Mentor junior engineers on test designs and trade-offs.

Skills

DFT

RTL design

Verification

Pattern generation

Silicon debug

Cross-functional collaboration

Education

Master's degree in Electrical Engineering

Tools

RTL/EDA tools

Job description

NVIDIA is seeking a DFT Methodology Engineer in Santa Clara to lead cutting-edge DFT architectures across complex SoCs. You will collaborate with RTL, timing, physical design, software, bring-up, and production teams to define and deploy robust DFT methodologies and test flows.

You will mentor junior engineers on design choices, cost, and quality, while ensuring security considerations in DFT and hardware systems. The role emphasizes cross-functional impact and innovation.