Senior DFT Engineer — Networking SoCs (Remote)

Arrow Electronics; Arizona; On-site; USD 100,000 - 130,000; Full time

Benefits offered by this job

Medical, Dental, Vision Insurance

401k with Matching Contributions

Paid Time Off

Tuition Reimbursement

Growth Opportunities

Job summary

A leading electronics company is seeking a Senior DFT Engineer for their team. The ideal candidate will have 5-7 years of experience in DFT implementation, including scan-insertion and ATPG for networking chips. Responsibilities involve RTL checks, silicon debug, and working with various tools like Mentor Tessent and Synopsys Tetramax. The position offers a competitive compensation package including medical, dental, and vision insurance, 401k with matching contributions, and various growth opportunities.

Qualifications

• 5-7 years of experience in DFT.
• Experience with scan-insertion and ATPG.
• Familiarity with pattern simulations, both with and without timing.

Responsibilities

• Perform DFT implementation for 3nm and 5nm Networking chips.
• Conduct RTL checks for scan-insertion compatibility.
• Manage silicon debug and bring-up for blocks and top.

Skills

DFT implementation

Scan-Insertion

ATPG

MBIST Insertion

Scripting languages (Perl, Shell, TCL)

Silicon debug

Communication skills

Education

B. Tech or M. Tech in Microelectronics/Electronics

Tools

Mentor Tessent

Cadence Modus

Synopsys Tetramax

VCS

Verdi

Job description

A leading electronics company is seeking a Senior DFT Engineer for their team. The ideal candidate will have 5-7 years of experience in DFT implementation, including scan-insertion and ATPG for networking chips. Responsibilities involve RTL checks, silicon debug, and working with various tools like Mentor Tessent and Synopsys Tetramax. The position offers a competitive compensation package including medical, dental, and vision insurance, 401k with matching contributions, and various growth opportunities.