Senior DFT Engineer AI-Driven ASIC/RFIC

Amazon Kuiper Manufacturing Enterprises LLC; Dulzura (CA); On-site; USD 185,000 - 250,000; Full time

Job summary

Amazon Kuiper Manufacturing Enterprises LLC is seeking a DFT Engineer to define and implement DFT solutions for advanced LEO chip SOCs. You will work with ASIC teams to integrate DFT logic including MBIST, clock controls, and JTAG, while ensuring coverage and timing targets are met across multiple sites.

The role emphasizes automation and AI-driven improvements to the DFT workflow, with collaboration across RFIC and test engineering teams to translate patterns and bring up digital blocks.

Qualifications

• Bachelor's degree in Electrical/Communications Engineering, or equivalent EE experience.
• 5+ years of experience in advanced DFT techniques for deep sub-micron nodes.
• Experience implementing DFT methodology and automated scripts for DFT insertion and validation.

Responsibilities

• Architect and define DFT solutions for LEO chips.
• Improve and customize DFT IPs and methodology; embrace AI flow.
• Collaborate with ASIC design teams to implement DFT logic (MBIST, clock controls, JTAG).
• Work with RFIC teams to maximize fault coverage on RF blocks.
• Ensure blocks meet DFT, timing and power targets with implementation team.
• Translate ATE patterns to tester format with Test engineering.
• Assist in bringing up digital portions of LEO chips with the test team.

Skills

Advanced DFT techniques

DFT Insertion & Validation

Automation scripting

AI/ML for DFT

Education

Bachelor's degree in Electrical/Communications Engineering

Master's or Ph.D in Electrical / Communications Engineering

Tools

MBIST

Logic BIST

Job description

Amazon Kuiper Manufacturing Enterprises LLC is seeking a DFT Engineer to define and implement DFT solutions for advanced LEO chip SOCs. You will work with ASIC teams to integrate DFT logic including MBIST, clock controls, and JTAG, while ensuring coverage and timing targets are met across multiple sites.

The role emphasizes automation and AI-driven improvements to the DFT workflow, with collaboration across RFIC and test engineering teams to translate patterns and bring up digital blocks.