Senior DFT & ATPG Engineer for SoC/ASIC Testing

Katalyst-Healthcares-

San Jose (CA)

In loco

USD 150.000 - 210.000

Tempo pieno

3 giorni fa

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Descrizione del lavoro

Katalyst-Healthcares- is seeking a DFT/ATPG engineer to join our silicon development team in San Jose, CA. The role focuses on advanced DFT strategies for SoC/ASIC designs, including scan testing, pattern generation, and diagnostic analysis.

The ideal candidate brings 4+ years of hands-on DFT/ATPG experience, familiarity with MBIST and IO test methodologies, and strong RTL understanding. Collaboration across teams and deployment in a high-volume production environment are essential.

Competenze

4+ years of hands-on experience in DFT and ATPG for SoC or ASIC designs.
Strong understanding of DFT fundamentals, including controllability, observability, and scan-based testing.
Proven expertise in ATPG pattern generation, analysis, and debug.
Experience with MBIST, including memory test architectures and diagnostics.
Knowledge of IO Test methodologies for interface and pin-level validation.
Solid understanding of clock DFT and clock verification concepts.
Strong grasp of digital design and RTL fundamentals.
Experience with industry-standard DFT/ATPG EDA tools.
Strong analytical, problem-solving, and communication skills.