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Sira Consulting invites an experienced DFT/ATPG engineer to join our fast-paced semiconductor programs in the United States. You will design and validate test strategies for SoC/ASIC, focusing on controllability, observability, and scan-based testing to ensure high test coverage.
Key responsibilities include ATPG pattern generation, analysis, and debugging, MBIST memory test architectures and diagnostics, and IO test methodologies for interface validation.
Sira Consulting invites an experienced DFT/ATPG engineer to join our fast-paced semiconductor programs in the United States. You will design and validate test strategies for SoC/ASIC, focusing on controllability, observability, and scan-based testing to ensure high test coverage.
Key responsibilities include ATPG pattern generation, analysis, and debugging, MBIST memory test architectures and diagnostics, and IO test methodologies for interface validation.