Senior DFT Architect for LEO Wireless Chips

Amazon Kuiper Manufacturing Enterprises LLC; San Ysidro (NM); On-site; USD 185,000 - 250,000; Full time

Benefits offered by this job

Health insurance

401(k) matching

RSU program

Job summary

Amazon Kuiper Manufacturing Enterprises LLC seeks an experienced DFT architect to define and implement DFT for cutting-edge LEO chip concepts. You will work with ASIC design and RFIC teams to ensure high fault coverage and robust timing and power convergence.

Responsibilities include drafting DFT solutions, refining IP and automation, and leveraging AI to optimize DFT insertion and validation across multiple sites.

Qualifications

• Bachelor's degree in Electrical/Communications Engineering or equal experience.
• 5+ years of experience in advanced DFT techniques for deep sub-micron nodes.
• Experience implementing DFT methodology and developing automated scripts for insertion and validation.

Responsibilities

• Architect and define DFT solutions for various LEO chips.
• Contribute to IP and DFT methodology improvements while embracing AI flow.
• Collaborate with ASIC design teams to integrate DFT logic (MBIST, clock controls, JTAG).
• Coordinate with RFIC teams to maximize fault coverage on mixed-signal blocks.
• Ensure blocks meet DFT, timing, and power targets with implementation teams.

Skills

DFT techniques

Scripting for DFT Insertion

MBIST

JTAG/Clock control

Education

Bachelor's degree in Electrical/Communications Engineering

Tools

AI/ML automation

Job description

Amazon Kuiper Manufacturing Enterprises LLC seeks an experienced DFT architect to define and implement DFT for cutting-edge LEO chip concepts. You will work with ASIC design and RFIC teams to ensure high fault coverage and robust timing and power convergence.

Responsibilities include drafting DFT solutions, refining IP and automation, and leveraging AI to optimize DFT insertion and validation across multiple sites.