Senior Device Engineer: Yield & Reliability Leader

Lattice Semiconductor; United States; Remote; USD 56,000 - 99,000; Full time

Job summary

Lattice Semiconductor seeks a Senior Staff Device Engineer with broad expertise in semiconductor technology, device physics, circuit analysis, CAD tools, and yield engineering. This role focuses on diagnosing yield and failure issues from circuit down to fab process, driving root cause actions and optimizing process conditions for robust yield and NPI success.

The engineer will collaborate with design, layout, product engineering, and foundries.

Qualifications

• M.S. or Ph.D. in Electrical Engineering or related field with 10+ years in fabless or foundry environments.
• Strong knowledge of transistor-level characterization and semiconductor reliability mechanisms (HCI, NBTI, TDDB).
• Proficient in CAD tools (Cadence Virtuoso, Synopsys) for schematic capture and layout analysis.
• Design for Manufacturing experience; link layout weak points to fab constraints.
• Experience with WAT parametric analysis, yields data, SPC, and failure diagnosis.
• Familiarity with Lattice FPGA architectures or programmable logic is a plus.

Responsibilities

• Device Engineering & Circuit Analysis: diagnose failures and optimize yield.
• Yield Engineering & Sustaining: lead yield improvements and process window optimization.
• Failure Analysis & Fault Isolation: coordinate analysis and root cause investigations.
• Quality & Customer Support: assist with escalations and corrective actions.

Skills

Device Physics & Reliability

DFM knowledge

WAT/ SPC analysis

Failure diagnosis coordination

Design for Manufacturing

Semiconductor reliability mechanisms

Education

M.S. or Ph.D. in Electrical Engineering / Microelectronics / Materials Science

Tools

Cadence Virtuoso

Synopsys

Job description

Lattice Semiconductor seeks a Senior Staff Device Engineer with broad expertise in semiconductor technology, device physics, circuit analysis, CAD tools, and yield engineering. This role focuses on diagnosing yield and failure issues from circuit down to fab process, driving root cause actions and optimizing process conditions for robust yield and NPI success.

The engineer will collaborate with design, layout, product engineering, and foundries.