Senior Technology Engineer - Foundry Interface Lead

Lattice Semiconductor Corp; United States; On-site; USD 190,000 - 232,000; Full time

Job summary

Lattice Semiconductor Corp is seeking a Senior Technology Engineer to bridge the gap between internal engineering teams and external foundries, ensuring PDK readiness and successful tape-out across multiple nodes.

The role focuses on aligning design flows with foundry requirements (DRC/LVS, EM/IR, ESD, SI/PI), supporting silicon characterization, and scaling processes for technology collateral and documentation across programs.

Qualifications

• BS/MS/PhD in Electrical Engineering or related field.
• 10+ years in semiconductor technology and foundry interfacing roles.
• Experience with taped-out and silicon validation across multiple nodes.

Responsibilities

• Serve as the primary technical interface to foundries, driving alignment and issue resolution.
• Partner with EDA teams on procurement, validation, and rollout of PDKs, models, and technology collateral.
• Ensure design and signoff flows align with foundry requirements (DRC/LVS, EM/IR, ESD, SI/PI).
• Own device test structure definition and support silicon characterization to validate process assumptions.
• Establish and scale processes for managing technology collateral, documentation, and design methodology across programs.

Skills

Cross-functional collaboration

Communication skills

External partner management

Education

BS/MS/PhD in Electrical Engineering or related field

Tools

CAD/EDA tools

PDK workflows

Job description

Lattice Semiconductor Corp is seeking a Senior Technology Engineer to bridge the gap between internal engineering teams and external foundries, ensuring PDK readiness and successful tape-out across multiple nodes.

The role focuses on aligning design flows with foundry requirements (DRC/LVS, EM/IR, ESD, SI/PI), supporting silicon characterization, and scaling processes for technology collateral and documentation across programs.