Senior Custom Library Cell Design Engineer – PPA Focus

Nuvacore

Austin (TX)

On-site

USD 140,000 - 250,000

Full time

14 days+

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Job summary

Nuvacore is assembling a Custom Library Circuit Engineer to drive library cell design and PPA optimization for next-gen CPU workloads. You will own end-to-end IP closure, from schematic to layout through DRC/LVS and parasitic extraction, while partnering with foundry and CAD teams to optimize cells for performance and power.

Ideal candidates have 12+ years in standard cell or memory design, strong transistor-level experience, and proficiency with EDA tools.

Qualifications

  • BS or MS in Electrical Engineering or related field.
  • 12+ years of experience in standard cell and/or custom memory circuit design.
  • Hands-on transistor-level design experience with static circuits and latches/flops.
  • Proficient with industry-standard EDA tools for schematic, layout, extraction, and characterization.
  • Experience providing feedback to foundry partners to improve PPA/yield.

Responsibilities

  • Design and characterize library cells to optimize PPA at advanced nodes.
  • Own end-to-end library IP closure from schematic to characterization.
  • Collaborate with Foundry/PDK, CAD, Physical Design, and DFT teams on process technology.
  • Define tools, flows, and methodology to raise design efficiency.

Skills

Standard cell design
Custom memory design
Transistor-level design
EDA tools proficiency
PPA optimization
Team collaboration

Education

BS or MS in Electrical Engineering

Tools

Schematic/Layout tools
DRC/LVS verification

Job description

Nuvacore is assembling a Custom Library Circuit Engineer to drive library cell design and PPA optimization for next-gen CPU workloads. You will own end-to-end IP closure, from schematic to layout through DRC/LVS and parasitic extraction, while partnering with foundry and CAD teams to optimize cells for performance and power.

Ideal candidates have 12+ years in standard cell or memory design, strong transistor-level experience, and proficiency with EDA tools.

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