Senior CPU Library Cell Design Engineer - PPA Focus

NUVACORE; Santa Clara (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

NUVACORE in Santa Clara is building a ground-up high-performance, low-power CPU for next-generation compute workloads. As a member of the CPU-specific custom circuit design team, you will enable the design to achieve target PPA specifications for the product.

You will design and characterize library cells, own end-to-end IP closure from schematic to characterization, and collaborate with Foundry/PDK, CAD, Physical Design, and DFT teams to optimize cells and process technology.

Qualifications

• BS or MS degree with 12+ years in standard cell or memory design.
• Hands-on transistor-level design with static circuits and state-retaining elements.
• Proficient with industry-standard EDA tools for schematic, layout, extraction, and characterization.
• Experience providing feedback to foundry partners to improve PPA, yield, and PDK quality.
• Strong STA and Liberty/CCS model correlation skills for timing/power in Functional and DFT modes.
• Excellent communication and collaboration with foundry, CAD, and physical design teams.

Responsibilities

• Design and characterize library cells including flip-flops, clock-gating cells, level shifters, and special purpose AOI cells to optimize PPA at advanced process nodes.
• Own end-to-end library IP closure: schematic and layout through DRC/LVS/antenna, parasitic extraction, and characterization.
• Partner with Foundry/PDK, CAD, Physical Design, and DFT teams to benchmark new process technology, validate IP on test chips, and co-optimize cells for downstream design PPA.
• Define and drive adoption of Tools, Flows, and Methodology — including characterization automation and compiler QA — to raise design efficiency and set team-wide best practices.

Skills

Transistor-level design

Latch/FF design

Custom logic gates

Timing/power analysis

Schematic design

Communication & collaboration

Education

BS or MS in Electrical Engineering

Tools

EDA tools

Parasitic extraction tools

Liberty/CCS modeling tools

Job description

NUVACORE in Santa Clara is building a ground-up high-performance, low-power CPU for next-generation compute workloads. As a member of the CPU-specific custom circuit design team, you will enable the design to achieve target PPA specifications for the product.

You will design and characterize library cells, own end-to-end IP closure from schematic to characterization, and collaborate with Foundry/PDK, CAD, Physical Design, and DFT teams to optimize cells and process technology.