Senior CPU Core RTL Designer for High-Performance Cores

Advanced Micro Devices, Inc; Fort Collins (CO); On-site; USD 120,000 - 180,000; Full time

Job summary

AMD in Fort Collins, CO is seeking a CPU Core RTL Design Engineer to design and optimize next-generation processor cores. You will collaborate with architecture, performance, verification, and physical design teams to deliver high-performance RTL and microarchitecture features.

This role challenges you to balance performance, power, and timing while contributing to the full product lifecycle from architecture through post-silicon debugging, with opportunities to influence future CPU designs and

Qualifications

• Experience with Verilog/SystemVerilog RTL development in CPU/SoC/ASIC environments
• Strong understanding of modern CPU architecture, especially out-of-order cores
• Expertise in logic design and high-speed processor pipeline development
• Experience with load / store, cache hierarchy, address translation / TLB, prefetch, branch prediction or similar core subsystems
• Knowledge of power-efficient and low-power design techniques, including timing and power optimization
• Familiarity with synthesis, place-and-route, and timing closure
• Experience debugging and optimizing designs in collaboration with performance and verification teams Exposure to the full product lifecycle, from architecture through post-silicon debug
• Familiarity with physical design, scripting (e.g., Python, Tcl), and concepts such as DFT, clocking, reset, and power management

Responsibilities

• Design and implement RTL for CPU core pipeline components and related logic
• Contribute to microarchitecture definition for next-generation processor cores
• Collaborate with architecture, verification, and performance teams to deliver optimized designs
• Analyze and improve performance, power, and timing characteristics
• Support design verification, synthesis, timing closure, and physical design efforts
• Debug and resolve pre-silicon and post-silicon issues
• Partner with cross-functional teams to align on design trade-offs and execution
• Contribute to scalable RTL methodologies, libraries, and best practices

Skills

Verilog/SystemVerilog RTL development

CPU architecture knowledge

High-speed pipeline development

Load/store & cache subsystems

Power-aware design techniques

Synthesis/Place-and-Route

DFT and clocking concepts

Education

Bachelor’s, Master’s, or PhD in Electrical Engineering/Computer Engineering or related field

Tools

Synthesis tools

Place-and-route tools

Job description

AMD in Fort Collins, CO is seeking a CPU Core RTL Design Engineer to design and optimize next-generation processor cores. You will collaborate with architecture, performance, verification, and physical design teams to deliver high-performance RTL and microarchitecture features.

This role challenges you to balance performance, power, and timing while contributing to the full product lifecycle from architecture through post-silicon debugging, with opportunities to influence future CPU designs and