Post-Silicon ATE Test Engineer (NPI/HPC)

Google Inc.; Sunnyvale (CA); On-site; USD 163,000 - 236,000; Full time

Job summary

Google Sunnyvale, CA is seeking an SoC Test Infrastructure Engineer to drive post-silicon NPI and high-volume test strategies for TPU and HPC products. You will develop and validate advanced Automated Test Equipment (ATE) programs and pre-silicon test solutions while building automation to streamline the silicon testing lifecycle.

You'll collaborate with Architecture, Design and Verification teams to bring up new products, validate test content, and enable scalable manufacturing solutions for

Qualifications

• Bachelor's degree in EE/CE/CS or related field.
• 8 years of test engineering experience.
• Experience with Python, Java, C# or C/C++.
• Experience with Advantest or Teradyne platforms.

Responsibilities

• Shape the future of AI/ML hardware acceleration and TPU architecture integration.
• Drive post-silicon NPI and high-volume test strategies for TPU and HPC products.
• Develop and validate ATE programs and pre-silicon test solutions.
• Build automated tools to optimize the silicon testing life-cycle.
• Collaborate with Architecture, Design and Verification teams to develop test solutions.
• Verify test solutions on pre-silicon models and develop ATE test modules, DC tests and production flows.

Skills

Python

Java

C#

C/C++

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field

Tools

Advantest

Teradyne

Job description

Google Sunnyvale, CA is seeking an SoC Test Infrastructure Engineer to drive post-silicon NPI and high-volume test strategies for TPU and HPC products. You will develop and validate advanced Automated Test Equipment (ATE) programs and pre-silicon test solutions while building automation to streamline the silicon testing lifecycle.

You'll collaborate with Architecture, Design and Verification teams to bring up new products, validate test content, and enable scalable manufacturing solutions for