Senior ASIC verifier

Swediumglobal; Town of Sweden (NY); On-site; USD 70,505 - 105,758; Full time

Job summary

Swediumglobal is seeking an experienced ASIC Verification Engineer. The role involves defining verification requirements, implementing test environments, debugging RTL, and collaborating with development teams. Candidates should possess a Master's degree in Electrical or Computer Engineering and 5+ years of ASIC verification experience, with a solid understanding of UVM methodology and System Verilog. This position offers remote work from the EU/UK with opportunities for continuous improvement and team collaboration.

Qualifications

• 5+ years of experience in ASIC verification.
• Excellent knowledge of UVM methodology and System Verilog.
• An analytical approach and be results-oriented under pressure.

Responsibilities

• Define verification requirements and strategies for ASIC designs.
• Implement verification environments and test cases.
• Collaborate with development teams to understand product requirements.

Skills

ASIC verification

UVM methodology

System Verilog

C programming

Formal verification

Analytical skills

English communication

Education

Master’s degree in Electrical or Computer Engineering

Job description

Swedium Global is the growing System Engineering and Solution Company, offers services like Semiconductor Engineering R&D Services, Embedded Systems Development, Custom Application Software Development, Web and Cloud Application Development, Testing Services, Consultancy and Outsourcing services to our clients across the globe for an onsite and offshore business model. Swedium Global is having presence in Sweden, Finland, Poland, Czech Republic and in India.

Location: Remote from EU/UK

What you will do

• Define verification requirements and strategies for ASIC designs based on functional specifications and following Ericsson development processes
• Implement verification environments and test cases to complete verification plans
• Measure functional and code coverage metrics, and drive toward completion targets
• Debug RTL in conjunction with designers
• Collaborate with other development teams to understand overall product requirements and drive efficient solutions
• Contribute to the continuous improvement of products, tools, and processes
• Guide and educate early career engineers

You will bring

• 5+ years of experience in ASIC verification
• Master’s degree in Electrical or Computer Engineering or equivalent
• Excellent knowledge of UVM methodology and System Verilog
• Experiences in Formal verification
• Knowledge of C, Emulation & HLS is preferable
• An analytical approach and be results oriented with the ability to deliver under pressure
• Excellent English verbal and written communication skills
• High self-motivation, an ability to work independently while being a great teammate.

Job Overview

• Location : Kista, Sweden
• Vacancy : 0