Senior ASIC Verification Engineer - Remote AI & HPC

cornelisnetworks; San Jose (CA); On-site; USD 180,000 - 250,000; Full time

Job summary

Cornelis Networks is seeking a Senior ASIC Verification Engineer to verify world-class SoCs for AI/HPC interconnect solutions. You’ll drive verification strategy, develop UVM environments, and lead cross-functional teams to ensure high-quality silicon.

Responsibilities include test planning, coverage closure, and mentoring engineers while collaborating with design, emulation, and silicon validation teams. Remote US-based role with strong growth potential.

Qualifications

• 8+ years of experience with UVM/SystemVerilog in verification of complex SoCs.
• Hands-on RTL debugging from RTL line through bug fixes using appropriate tools.
• Experience developing ground-up testbenches and using revision control systems like Git or SVN.
• B.S. degree in Computer Engineering, CS, or EE; MS is a plus.

Responsibilities

• Define overall SOC level verification strategy and technical direction.
• Develop UVM environments for RTL verification at block, unit, and SoC levels.
• Create and execute functional tests per verification plans.
• Instrument testbenches for functional and code coverage and drive to closure.
• Collaborate with design, software, emulation, and silicon validation teams.
• Lead and mentor team members; promote AI-assisted verification practices.
• Enforce coding and verification guidelines across the group.

Skills

UVM

SystemVerilog

Debugging RTL

Testbench development

AI tool usage

Education

B.S. in Computer Engineering, Computer Science, or Electrical Engineering

M.S. in Computer Engineering, Computer Science, or Electrical Engineering

Tools

VCS

Verdi

Git

SVN

Job description

Cornelis Networks is seeking a Senior ASIC Verification Engineer to verify world-class SoCs for AI/HPC interconnect solutions. You’ll drive verification strategy, develop UVM environments, and lead cross-functional teams to ensure high-quality silicon.

Responsibilities include test planning, coverage closure, and mentoring engineers while collaborating with design, emulation, and silicon validation teams. Remote US-based role with strong growth potential.